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| Number | Title | Issue Date |
| 6775237 | Methods and apparatus for burst tolerant excessive bit error rate alarm detection and clearing The excessive bit error rate detection algorithm operates in two modes: BURST mode and non-BURST mode. In non-BURST mode, an alarm state is entered if an error count exceeds a threshold within a set number of frames and exits the alarm state when the error count sta... | 08/10/2004 |
| 6271698 | Method and apparatus for correcting imperfectly equalized bipolar signals An apparatus for correcting imperfectly equalized bipolar signals includes a delay line having a reset control, an AND gate, and a one-shot multivibrator. The apparatus is used in conjunction with an adaptive equalizer with the output of the adaptive equa... | 08/07/2001 |
| 6246682 | Method and apparatus for managing multiple ATM cell queues Methods for managing multiple queues of ATM cells in shared RAM while efficiently supporting multicasting include providing a common memory for storing ATM cells and for storing at least one pointer to each ATM cell stored, providing a management memory f... | 06/12/2001 |
| 5774465 | Method and apparatus for providing multiple multicast communication sessions in an ATM destination switch An ATM destination switch includes an ATM layer device coupled to a physical layer device. The ATM layer device includes a ATM layer interface which receives incoming ATM cells, a processor which is typically with an associated translation RAM, and an ATM... | 06/30/1998 |
| 5615237 | Telecommunications framer utilizing state machine A synchronizer for telecommunications signals includes a telecommunications interface for receiving bits of a telecommunications signal having a frame, an SRAM which stores bit-defined states for a plurality of bit locations in the frame, a state update l... | 03/25/1997 |
| 4914429 | Switch components and multiple data rate non-blocking switch network utilizing the same A switching component preferably in integrated circuit form is provided. The switching component has a plurality of inlet and outlet data ports with associated inlet and outlet clock ports, a clock regenerator and a flip-flop for each outlet data port, an... | 04/03/1990 |
