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| Number | Title | Issue Date |
| 6219775 | Massively parallel computer including auxiliary vector processor A massively-parallel computer includes a plurality of processing nodes and at least one control node interconnected by a network. The network faciliates the transfer of data among the processing nodes and of commands from the control node to the processin... | 04/17/2001 |
| 5872987 | Massively parallel computer including auxiliary vector processor A massively-parallel computer includes a plurality of processing nodes and at least one control node interconnected by a network. The network faciliates the transfer of data among the processing nodes and of commands from the control node to the processin... | 02/16/1999 |
| 5535408 | Processor chip for parallel processing system A monolithic processing chip for a parallel processing system comprises a processor circuit and a memory circuit. The processor circuit processes data received from said associated memory circuit in accordance with processor control signals to generate pr... | 07/09/1996 |
| 5485627 | Partitionable massively parallel processing system Apparatus is described for allocating the resources of a parallel computer. The computer is divided into a plurality of processor arrays, a plurality of host computers are provided, and the host computers and the arrays are interfaced by an interconnectio... | 01/16/1996 |
| 5404562 | Massively parallel processor including queue-based message delivery system A massively parallel computer system including a plurality of processing nodes under control of a system controller. The processing nodes are interconnected by a plurality of communications links. Each processing node comprises at least one processor, a m... | 04/04/1995 |
| 5390298 | Parallel computer system including arrangement for quickly draining messages from message router A computer including a processor array and a routing network. Processors in the processor array generate messages for transfer to over the routing network, each message including a path identifier portion identifying a path from a source, message processo... | 02/14/1995 |
| 5390336 | C' parallel computer system having processing nodes with distributed memory with memory addresses defining unitary system address space A method and apparatus are described for improving the utilization of a parallel computer by allocating the resources of the parallel computer among a large number of users. A parallel computer is subdivided among a large number of users to meet the requi... | 02/14/1995 |
| 5388214 | Parallel computer system including request distribution network for distributing processing requests to selected sets of processors in parallel A computer comprising a plurality of processing nodes, a control node and a request distribution network. Each processing node receives processing requests and generates in response processed data. The control node generates processing requests for transf... | 02/07/1995 |
| 5388262 | Method and apparatus for aligning the operation of a plurality of processors A method and apparatus are disclosed for aligning a plurality of multi-processors. The apparatus preferably comprises an alignment unit associated with each processor and a logic network for combining the output of the alignment unit and for broadcasting ... | 02/07/1995 |
| 5381550 | System and method for compiling a source code supporting data parallel variables A compiler for compiling a computer program which is adapted for use with a data parallel computer. The compiler supports variables which involve parallelism. Variables which involve parallelism are parallel variables, templates for parallel variables cal... | 01/10/1995 |
| 5367677 | System for iterated generation from an array of records of a posting file with row segments based on column entry value ranges A query processing system for processing queries in connection with a document text base which has entries each identifying a document and a word in the document. The query processing system includes a plurality of processing elements for processing data ... | 11/22/1994 |
| 5367692 | Parallel computer system including efficient arrangement for performing communications among processing node to effect an array transposition operation A processing element array and a controller. The processing element array comprises a plurality of processing element nodes interconnected by a plurality of communications links in the form of a hypercube. Each processing element node has a memory includi... | 11/22/1994 |
| 5361363 | Input/output system for parallel computer for performing parallel file transfers between selected number of input/output devices and another selected number of processing nodes A computer comprising a plurality of processing elements and an input/output processor interconnected by a routing network. The routing network transfers messages between the processing elements and the input/output processor. The processing elements perf... | 11/01/1994 |
| 5355492 | System for compiling parallel communications instructions including their embedded data transfer information The present invention is directed towards a compiler for processing parallel communication instructions on a data parallel computer. The compiler of the present invention comprises a front end, a middle end, an optimizer, and a back end. The front end con... | 10/11/1994 |
| 5355494 | Compiler for performing incremental live variable analysis for data-parallel programs A compiler for compiling a computer program wherein the computer program is adapted for use with a data parallel computer. The compiler comprises an optimizer which optimizes the compiled code. In optimizing the compiled code, the optimizer performs live ... | 10/11/1994 |
| 5353412 | Partition control circuit for separately controlling message sending of nodes of tree-shaped routing network to divide the network into a number of partitions A digital computer having a plurality of message generating elements each generating and receiving messages and a network for transferring messages among the message generating elements. The network includes a plurality of node clusters interconnected in ... | 10/04/1994 |
| 5347654 | System and method for optimizing and generating computer-based code in a parallel processing environment A system and method for optimizing statements to produce more efficient assembly language for use in a parallel processing environment. In doing this, the present invention separates elemental from non-elemental nodes in a statement, encapsulates the elem... | 09/13/1994 |
| 5333268 | Parallel computer system A digital computer includes a plurality of processing elements, a command processor, a diagnostic processor and a communications network. The processing elements each performs data processing and data communications operations in connection with commands.... | 07/26/1994 |
| 5317481 | Circuit board and insertion tool A system for installing a circuit board edge connector into a motherboard connector from the side to accommodate high density card arrangements that obstruct overhead clearance. In one embodiment, the system utilizes an insertion tool which conveys the ci... | 05/31/1994 |
| 5301310 | Parallel disk storage array system with independent drive operation mode A mass storage system for connection to a computer. The mass storage system includes a plurality of independently-controllable storage modules, each storage module having a storage element for storing data in a plurality of storage locations and a retriev... | 04/05/1994 |
| 5289156 | Data coupling arrangement A data coupling arrangement for successively receiving, in parallel, nibbles of respective data words, each nibble having a value, and for selectively coupling nibbles associated with one word in response to the relative values of the words. The selective... | 02/22/1994 |
| 5287386 | Differential driver/receiver circuit A new driver circuit and receiver circuit for transmitting and receiving a differential signal pair. The driver circuit includes true and complement signal generating elements that generate a differential signal pair in tandem. Each of the true and comple... | 02/15/1994 |
| 5278986 | System and method for compiling a source code supporting data parallel variables A compiler for compiling a computer program which is adapted for use with a data parallel computer. The compiler supports variables which involve parallelism. Variables which involve parallelism are parallel variables, templates for parallel variables cal... | 01/11/1994 |
| 5274818 | System and method for compiling a fine-grained array based source program onto a course-grained hardware The present invention provides a parallel vector machine model for building a compiler that exploits three different levels of parallelism found in a variety of parallel processing machines, and in particular, the Connection Machine.RTM. Computer CM-2 sys... | 12/28/1993 |
| 5266838 | Power supply system including power sharing control arrangement A power supply system for powering a plurality of loads. The system includes a plurality of energizeable power supply circuits each associated with one of the loads for supplying power thereto in response to a power supply circuit control signal. An actua... | 11/30/1993 |
| 5265207 | Parallel computer system including arrangement for transferring messages from a source processor to selected ones of a plurality of destination processors and combining responses A parallel computer comprising a plurality of processors and an interconnection network for transferring messages among the processors. At least one of the processors, as a source processor, generates messages, each including an address defining a path th... | 11/23/1993 |
| 5265231 | Refresh control arrangement and a method for refreshing a plurality of random access memory banks in a memory system A memory controller and a method for controlling a memory including at least one memory bank including a plurality of storage locations. The memory controller receives memory access requests over a bus in a digital computer system and, in response initiat... | 11/23/1993 |
| 5261105 | System for transferring blocks of data among diverse units having cycle identifier signals to identify different phase of data transfer operations A data transfer arrangement for use in a data processing system comprising a processing array and at least one input/output unit and a host for issuing commands, including data transfer commands, to both the processing array and the input/output unit. The... | 11/09/1993 |
| 5251131 | Classification of data records by comparison of records to a training database using probability weights Classification of natural language data wherein the natural language data has an open-ended range of possible values or the data values do not have a relative order. A training database stores training records, wherein each training record includes predic... | 10/05/1993 |
| 5247694 | System and method for generating communications arrangements for routing data in a massively parallel processing system A system for generating communication pattern information for facilitating communication among processing nodes interconnected over communications links in a predetermined pattern to form a massively parallel processor. The system includes a mapping eleme... | 09/21/1993 |
| 5247613 | Massively parallel processor including transpose arrangement for serially transmitting bits of data words stored in parallel A massively parallel processing system comprising a plurality of processing nodes controlled in parallel by a controller. The processing nodes are interconnected by a plurality of communications links. Each processing node comprises a memory, a transposer... | 09/21/1993 |
| 5241600 | Vertification system for credit or bank card or the like A verification system for verifying authorized use of a credit or bank card or other identification card. The verification system makes use of an image embossed on or laminated onto a card, and information stored on a magnetic strip or other storage arran... | 08/31/1993 |
| 5238423 | Circuit board and insertion tool A system for installing a circuit board edge connector into a motherboard connector from the side to accommodate high density card arrangements that obstruct overhead clearance. In one embodiment, the system utilizes an insertion tool which conveys the ci... | 08/24/1993 |
| 5222237 | Apparatus for aligning the operation of a plurality of processors A method and apparatus are disclosed for aligning a plurality of multi-processors. The apparatus preferably comprises an alignment unit associated with each processor and a logic network for combining the output of the alignment unit and for broadcasting ... | 06/22/1993 |
| 5222216 | High performance communications interface for multiplexing a plurality of computers to a high performance point to point communications bus A high performance communications interface device for connecting a high speed computer to a high performance communications bus. The high performance communications interface device includes a high performance communications interface device processor, a... | 06/22/1993 |
| 5212484 | Digital to analog converter system employing plural digital to analog converters which is insensitive to resistance variations A digital to analog conversion system includes two digital to analog converters, a selector circuit and a control circuit. Each digital to analog converter generates an output signal having a voltage level which can be varied in response to a control sign... | 05/18/1993 |
| 5212773 | Wormhole communications arrangement for massively parallel processor A parallel processor array is disclosed comprising an array of processor/memories and devices for interconnecting these processor/memories in an n-dimensional pattern having at least 2n nodes through which data may be routed from any processor/... | 05/18/1993 |
| 5202979 | Storage system using multiple independently mechanically-driven storage units A storage system for data words in which error correction bits are generated for each data word and are stored independently from the data word on a separate mechanically-driven medium. In another aspect, the storage system serves a wide high throughput p... | 04/13/1993 |
| 5187801 | Massively-parallel computer system for generating paths in a binomial lattice An interest rate scenario generation system generates a plurality of paths through a binomial lattice arrangement to facilitate generation of a like plurality of interest rate scenarios. The system includes a plurality of processing elements each for perf... | 02/16/1993 |
| 5175865 | Partitioning the processors of a massively parallel single array processor into sub-arrays selectively controlled by host computers A parallel computer comprised of a plurality of identical processors, each processor having control and data inputs and outputs for communication with the host computers and separate interprocessor inputs and outputs for communication between the processo... | 12/29/1992 |
