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| Number | Title | Issue Date |
| RE43404 | Methods for providing void-free layer for semiconductor assemblies A method of providing a substantially void free layer for one or more flip chip assemblies, or one or more microelectronic components, utilizing a curable encapsulant. Also disclosed is a method of injecting an encapsulant into an assembly and a method of treating a... | 05/22/2012 |
| 8155663 | Wearable ultra-thin miniaturized mobile communications A cellular telephone is provided with a wearable housing, desirably in a form which can be concealed in the user's clothing, wallet, or other place. The housing may be devoid of switches or buttons for controlling the cellular telephone, and control inputs can be pr... | 04/10/2012 |
| 8148205 | Method of electrically connecting a microelectronic component A method of making a microelectronic connection component is disclosed. A plurality of portions of a conductive, etch-resistant material is provided on a surface of a metallic sheet. The sheet is etched from the surface to form posts extending generally parallel to ... | 04/03/2012 |
| 8148199 | Method of electrically connecting a microelectronic component A microelectronic assembly is provided which can include an element including a first dielectric layer and a second dielectric layer overlying the first dielectric layer, the second dielectric layer having an exposed surface defining an exposed major surface of the ... | 04/03/2012 |
| 8143095 | Sequential fabrication of vertical conductive interconnects in capped chips A method is provided of forming a capped chip which includes a conductive interconnect exposed through an opening in the cap. A cap having openings extending between outer and inner surfaces is aligned and joined to a chip. A mass of fusible conductive material is p... | 03/27/2012 |
| 8133808 | Wafer level chip package and a method of fabricating thereof Wafer level chip packages including risers having sloped sidewalls and methods of fabricating such chip packages are disclosed. The inventive wafer level chip packages may advantageously be used in various microelectronic assemblies. ... | 03/13/2012 |
| 8115308 | Microelectronic assemblies having compliancy and methods therefor A microelectronic assembly is disclosed that includes a semiconductor wafer with contacts, compliant bumps of dielectric material overlying the first surface of the semiconductor wafer, and a dielectric layer overlying the first surface of the semiconductor wafer an... | 02/14/2012 |
| 8114711 | Method of electrically connecting a microelectronic component A method of treating a component can include providing a component including a plurality of metallic posts extending generally parallel to one another. The providing step can be performed so that the posts have solder on the tips of the posts but not covering other ... | 02/14/2012 |
| 8093697 | Microelectronic packages and methods therefor A method of making a microelectronic assembly includes providing a microelectronic package having a substrate, a microelectronic element overlying the substrate and at least two conductive elements projecting from a surface of the substrate, the at least two conduct... | 01/10/2012 |
| 8076788 | Off-chip vias in stacked chips A microelectronic assembly includes first and second stacked microelectronic elements, each having spaced apart traces extending along a front face and beyond at least a first edge thereof. An insulating region can contact the edges of each microelectronic element a... | 12/13/2011 |
| 8071424 | Substrate for a microelectronic package and method of fabricating thereof Substrates having molded dielectric layers and methods of fabricating such substrates are disclosed. The substrates may advantageously be used in microelectronic assemblies having high routing density. ... | 12/06/2011 |
| 8067267 | Microelectronic assemblies having very fine pitch stacking A method of making a stacked microelectronic assembly includes providing a first microelectronic package that includes a first substrate having a first dielectric layer, conductive posts, and conductive traces extending along the surface of the first dielectric laye... | 11/29/2011 |
| 8058101 | Microelectronic packages and methods therefor A method of making a microelectronic assembly includes providing a microelectronic package having a substrate, a microelectronic element overlying the substrate and at least two conductive elements projecting from a surface of the substrate, the at least two conduct... | 11/15/2011 |
| 8053281 | Method of forming a wafer level package A method is provided for forming a microelectronic package at a wafer level. Such method can include providing a semiconductor wafer having a surface with a pattern of electrical contacts thereon. An interposer component can be provided which has a compliant dielect... | 11/08/2011 |
| 8049426 | Electrostatic fluid accelerator for controlling a fluid flow An electrostatic fluid accelerator includes an electrode array comprising an array of corona discharge electrodes and an array of accelerating electrodes for moving a fluid. A detector is configured to sense a constituent component of the fluid. A control circuit su... | 11/01/2011 |
| 8046912 | Method of making a connection component with posts and pads A packaged microelectronic element includes connection component incorporating a dielectric layer (22) carrying traces (58) remote from an outer surface (26), posts (48) extending from the traces and projecting beyond the outer surface of... | 11/01/2011 |
| 8043895 | Method of fabricating stacked assembly including plurality of stacked microelectronic elements A method is provided for fabricating a stacked microelectronic assembly by steps including stacking and joining first and second like microelectronic substrates, each including a plurality of like microelectronic elements attached together at dicing lanes. Each micr... | 10/25/2011 |
| 8043573 | Electro-kinetic air transporter with mechanism for emitter electrode travel past cleaning member Systems and methods for cleaning emitter electrodes of air conditioner systems are provided. The air conditioning system includes an emitter electrode, a collector electrode and a high voltage generator to provide a high voltage potential difference between the emit... | 10/25/2011 |
| 8039959 | Microelectronic connection component A microelectronic connection component includes a substrate having a first surface, a second surface and a peripheral edge. First and second terminals are exposed at the first surface of the substrate. Wire bond pads are exposed proximate the peripheral edge of the ... | 10/18/2011 |
| 8039363 | Small chips with fan-out leads A method of expanding the contact pitch for un-diced chips in an array by pre-slicing the array in a first direction, attaching a lead frame to the chips' contacts, and then slicing the array and attached lead frame in the second direction. The lead frame has leads ... | 10/18/2011 |
| 8034665 | Microelectronic package with thermal access A method of forming a microelectronic package including the steps of providing a three-layer metal plate, having a first layer, a second layer and a third layer. A plurality of conductive elements is formed from the first layer of the metal plate. A dielectric sheet... | 10/11/2011 |
| 8026611 | Stacked microelectronic packages having at least two stacked microelectronic elements adjacent one another A microelectronic assembly including a first and second microelectronic elements. Each of the microelectronic elements have oppositely-facing first and second surfaces and edges bounding the surfaces. The first microelectronic element is disposed on the second micro... | 09/27/2011 |
| 8022527 | Edge connect wafer level stacking In accordance with an aspect of the invention, a stacked microelectronic package is provided which may include a plurality of subassemblies, e.g., a first subassembly and a second subassembly underlying the first subassembly. A front face of the second subassembly m... | 09/20/2011 |
| 7999397 | Microelectronic packages and methods therefor A microelectronic package includes a microelectronic element having faces and contacts, the microelectronic element having an outer perimeter, and a substrate overlying and spaced from a first face of the microelectronic element, whereby an outer region of the subst... | 08/16/2011 |
| 7999379 | Microelectronic assemblies having compliancy A microelectronic assembly includes a microelectronic element, such as a semiconductor wafer or semiconductor chip, having a first surface and contacts accessible at the first surface, and a compliant layer overlying the first surface of the microelectronic element,... | 08/16/2011 |
| 7994644 | Package stacking through rotation A packaged microelectronic element includes a package element that further includes a dielectric element having a bottom face and a top face, first and second bond windows extending between the top and bottom faces, a plurality of chip contacts disposed at the top f... | 08/09/2011 |
| 7994622 | Microelectronic packages having cavities for receiving microelectric elements Packaged microelectronic elements are provided which include a dielectric element, a cavity, a plurality of chip contacts and a plurality of package contacts, and microelectronic elements having a plurality of bond pads connected to the chip contacts. ... | 08/09/2011 |
| 7990245 | Multi-sectional bobbin for high voltage inductor or transformer Improved multi-sectional bobbin designs described herein define a channel suitable to accommodate a portion of the wire that transits from prior winding section to the next, wherein opposing walls of the channel so defined separate the transiting portion of the wire... | 08/02/2011 |
| 7989940 | System and method for increasing the number of IO-s on a ball grid package by wire bond stacking of same size packages through apertures A multi-layer electronic package having polymeric tape layers, where at least one of the polymeric tape layers has a via, through hole, or aperture therein to pass wiring between the layers. This enables a balance of package size, adhesive thickness, chip access, in... | 08/02/2011 |
| 7976615 | Electro-kinetic air mover with upstream focus electrode surfaces An electro-kinetic air mover for creating an airflow using no moving parts. The electro-kinetic air mover includes an ion generator that has an electrode assembly including a first array of emitter electrodes, a second array of collector electrodes, and a high volta... | 07/12/2011 |
| 7964947 | Stacking packages with alignment elements A stacked microelectronic assembly is disclosed, as are different embodiments related to the same. The stacked microelectronic assembly includes a plurality of stackable microelectronic units each having a semiconductor element mounted on a substrate, and also inclu... | 06/21/2011 |
| 7952195 | Stacked packages with bridging traces A microelectronic assembly that includes a first microelectronic element having a first rear surface. The assembly further includes a second microelectronic element having a second rear surface. The second microelectronic element is attached to the first microelectr... | 05/31/2011 |
| 7939934 | Microelectronic packages and methods therefor An assembly for testing microelectronic devices includes a microelectronic element having faces and contacts, a flexible substrate spaced from and overlying a first face of the microelectronic element, and a plurality of conductive posts extending from the flexible ... | 05/10/2011 |
| 7935569 | Components, methods and assemblies for stacked packages A bottom unit including a bottom unit semiconductor chip is mounted to a circuit board and one or more top elements such as packaged semiconductor chips are mounted to the bottom unit. Both mounting operations can be performed using the same techniques as commonly e... | 05/03/2011 |
| 7911805 | Multilayer wiring element having pin interface A method of forming contacts for an interconnection element, includes (a) joining a conductive element to an interconnection element having multiple wiring layers, (b) patterning the conductive element to form conductive pins, and (c) electrically interconnecting th... | 03/22/2011 |
| 7901989 | Reconstituted wafer level stacking A stacked microelectronic assembly is fabricated from a structure which includes a plurality of first microelectronic elements having front faces bonded to a carrier. Each first microelectronic element may have a first edge and a plurality of first traces extending ... | 03/08/2011 |
| 7872344 | Microelectronic assemblies having compliant layers A compliant semiconductor chip package assembly includes a a semiconductor chip having a plurality of chip contacts, and a compliant layer having a top surface, a bottom surface and sloping peripheral edges, whereby the bottom surface of the compliant layer overlies... | 01/18/2011 |
| 7858445 | Wire bonded wafer level cavity package A microelectronic device includes a chip having a front surface and a rear surface, the front surface having an active region and a plurality of contacts exposed at the front surface outside of the active region. The device further includes a lid overlying the front... | 12/28/2010 |
| 7855623 | Low loss RF transmission lines having a reference conductor with a recess portion opposite a signal conductor A transmission structure having high propagation velocity and a low effective dielectric loss. The structure comprises a dielectric, a first reference conductor disposed below the dielectric, a signal conductor disposed above the dielectric, and a second reference c... | 12/21/2010 |
| 7829438 | Edge connect wafer level stacking In accordance with an aspect of the invention, a stacked microelectronic package is provided which may include a plurality of subassemblies, e.g., a first subassembly and a second subassembly underlying the first subassembly. A front face of the second subassembly m... | 11/09/2010 |
