Did You Know...
...that after Parker Brothers executives turned down the game of Monopoly because it had "52 fundamental errors" (including taking too long to play), a copy of the game wound up in the home of the company president who stayed up until 1 a.m. to finish playing it? He was so impressed by the game that the next day he wrote to inventor Charles Darrow and offered to buy it!
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| Number | Title | Issue Date |
| 7663389 | Automated test equipment with DIB mounted three dimensional tester electronics bricks Automated test equipment is provided which includes a test head having a tester electronics bricks mounted to a device interface board. In some embodiments, support circuitry is positioned adjacent the tester electronics bricks opposite the DIB. The support circuitr... | 02/16/2010 |
| 7649375 | Connector-to-pad printed circuit board translator and method of fabrication In one embodiment, a laminated printed circuit board translator is provided. In some embodiments, the translator includes a receiving board adapted to receive a pin, the receiving board includes a plated via extending through the receiving board and has a hole for r... | 01/19/2010 |
| 7590170 | Method and apparatus for measuring jitter A system and method for characterizing the jitter of a periodic signal. Samples of the signal are taken with a sampling device. A set of samples representing a particular value of the signal in multiple cycles of the periodic signal is collected. Those values are fo... | 09/15/2009 |
| 7509226 | Apparatus and method for testing non-deterministic device data A method and system is provided for detecting and correcting non-deterministic data that provides substantially real-time validation results and maximizes flexibility for the device manufacturer while reducing test costs. The automatic test apparatus and method can ... | 03/24/2009 |
| 7395479 | Over-voltage test for automatic test equipment Automatic test equipment including a digital test instrument that may test for and respond to over-voltage conditions. Information on over-voltage conditions may be used in detecting or diagnosing fault conditions within a system under test. Over-voltage conditions ... | 07/01/2008 |
| 7379395 | Precise time measurement apparatus and method A time measurement system that uses two signals generated by direct digital synthesis. The generated signals have the same frequency but different phase. One signal is used to identify the start of the measurement interval and the other signal is used to identify a ... | 05/27/2008 |
| 7327870 | Method for inspecting a region of interest An inspection method utilizing vertical slice imaging. A number of horizontal slice images, extending through an object of interest, are acquired. A vertical region of interest is defined from the data representing the horizontal slice images. A vertical slice image... | 02/05/2008 |
| 7327816 | High resolution synthesizer with improved signal purity An automatic test system using a DDS signal generator to create a signal with high spectral purity or a low jitter digital clock. The low jitter clock has variable frequency and is programmed to control other test functions, such as the generation of arbitrary wavef... | 02/05/2008 |
| 7305466 | Network fault isolation Techniques are provided for improved fault isolation and fault reduction. A system for use with a data network includes multiple diagnostic units each adapted to communicate with the network including to a network user. A central controller is operatively connected ... | 12/04/2007 |
| 7285851 | Liquid immersion cooled multichip module In one embodiment, a liquid immersion cooled multichip module is provided which includes a substrate having chips mounted thereon and which is adapted to mount with a printed circuit board. A lid is adapted to secure to the printed circuit board so as to mount with ... | 10/23/2007 |
| 7263174 | Predicting performance of telephone lines for data services A method characterizes a customer line for data transmission. The method includes measuring electrical properties of the customer line from a central location, identifying a line model from the measurements, and identifying a modem model for a modem selected for use... | 08/28/2007 |
| 7216273 | Method for testing non-deterministic device data A method for testing semiconductor devices that output non-deterministic entity information such as packet and control signals is disclosed. The method includes the steps generating test signals with a semiconductor tester and applying the generated test signals to ... | 05/08/2007 |
| 7187549 | Heat exchange apparatus with parallel flow In at least one embodiment, the present invention is a heat exchange apparatus which includes at least one heat exchanger, an intake manifold, and at least one multichip module. Where the intake manifold is in fluid communication with each heat exchanger and where t... | 03/06/2007 |
| 7180321 | Tester interface module In one embodiment, a tester interface module for connecting a plurality of signal paths from at least one electronic assembly to at least one other electronic assembly is provided. The interface module includes a capture board having center conductor vias with cente... | 02/20/2007 |
| 7174279 | Test system with differential signal measurement A test system with easy to fabricate hardware to make measurements on differential signals. The two legs of a differential signal are applied to a comparator. A variable bias is introduced into the comparison operation. By taking multiple measurements with different... | 02/06/2007 |
| 7161392 | Comparator feedback peak detector There is disclosed a circuit and a process for detecting peak-to-peak voltage. The circuit comprises a first comparator having an output coupled to a first capacitor, a non-inverting input for receiving a high frequency AC waveform, and an inverting input, a second ... | 01/09/2007 |
| 7151367 | Method of measuring duty cycle A method for measuring the duty cycle of a signal. The method is fast enough to allow duty cycle measurements of semi-conductor components during production. The method can also be performed inexpensively using automatic test equipment. A comparator in a digital cha... | 12/19/2006 |
| 7146584 | Scan diagnosis system and method A scan diagnosis system for testing and diagnosing a device-under-test is disclosed. The system includes a semiconductor tester adapted for coupling to the device-under-test and operative to generate pattern signals in the ATE domain to test the device-under-test an... | 12/05/2006 |
| 7143323 | High speed capture and averaging of serial data by asynchronous periodic sampling An apparatus and process for measuring, testing, and/or characterizing high-speed bit streams includes repeating a serial bit steam and repetitively undersampling the repeated bit stream at a plurality of timing locations. Samples for each timing location are separa... | 11/28/2006 |
| 7135881 | Method and system for producing signals to test semiconductor devices A method of and system for producing signals to test semiconductor devices includes a pin electronic (PE) stage for providing a parametric measurement unit (PMU) current test signal to a semiconductor device under test. The PE stage also senses a response from the s... | 11/14/2006 |
| 7135854 | Rear-mounted gimbal for supporting test head A manipulator for supporting heavy as well as lighter test heads in a small footprint includes a body and an interface for supporting a test head from behind. The interface includes a first portion fixedly attached to the body and a second portion fixedly attached t... | 11/14/2006 |
| 7126519 | Low-spur low-distortion digital-to-analog converter A system and method include receiving an input signal; transmitting high-frequency components of the input signal to a first converter; attenuating low-frequency components of the input signal to a predetermined level such that the low-frequency components of dither... | 10/24/2006 |
| 7127506 | PC configuration fault analysis A diagnostic unit which detects instances of misconfiguration of a subscriber's PC is presented. Many problems experienced by PC subscribers attempting to access a network are related to misconfiguration of the subscriber's PC. The diagnostic unit is able to communi... | 10/24/2006 |
| 7123075 | Current mirror compensation using channel length modulation A current compensation circuit for use with a current mirror circuit is disclosed. The current mirror circuit has a current path defined by a first programmable current mirror stage driving a first fanout current mirror stage. The first programmable current mirror s... | 10/17/2006 |
| 7117410 | Distributed failure analysis memory for automatic test equipment A failure analysis memory is disclosed for use with a semiconductor tester for storing bit image failure information relating to a memory-under-test. The semiconductor tester has a plurality of channel cards disposed proximate the memory-under-test. The failure anal... | 10/03/2006 |
| 7102375 | Pin electronics with high voltage functionality In one aspect, the invention is an integrated circuit (IC) for use in testing a device. The IC includes a pin electronics (PE) driver having an output and a pin. The IC also includes a buffer connected to the output of the PE driver and the pin. The first voltage me... | 09/05/2006 |
| 7088092 | Silicon-on-insulator channel architecture for automatic test equipment A channel architecture for use in automatic test equipment is disclosed. The channel architecture comprises pattern generation circuitry and timing circuitry responsive to the pattern generation circuitry to generate timing signals. Formatting circuitry coupled to t... | 08/08/2006 |
| 7085668 | Time measurement method using quadrature sine waves A time measurement circuit includes N time stamping units that each includes a dual sinusoid interpolator for achieving high timing resolution. The time measurement circuit is capable of time stamping input signals at a high re-trigger rate, and is thus well suited ... | 08/01/2006 |
| 7080304 | Technique for programming clocks in automatic test system A system and method for configuring an automatic test system to produce a plurality of clocks from a reference clock includes a user interface and software. The user interface receives a plurality of inputs that specify desired frequencies of the plurality of clocks... | 07/18/2006 |
| 7071703 | Technique for estimation of a subscriber line insertion loss A method and apparatus for pre-qualifying lines with respect to estimating the insertion loss of the line is presented. End-to-end insertion loss at high frequencies is estimated from measurements made at low frequencies through the voice switch at the central offic... | 07/04/2006 |
| 7064535 | Measurement circuit with improved accuracy A measurement circuit for measuring input voltages in an automatic test system includes a pedestal source, a differential amplifier, and a feedback amplifier. The differential amplifier measures a “residue,” i.e., a difference between an input signal and a pedes... | 06/20/2006 |
| 7064616 | Multi-stage numeric counter oscillator A numeric counter oscillator is disclosed comprising a quotient accumulator and a remainder accumulator. The quotient accumulator has a programmable input for receiving a QUOTIENT value, a reference clock input and a multi-bit output. The output is adapted for trans... | 06/20/2006 |
| 7061307 | Current mirror compensation circuit and method A current compensation circuit for use with a current mirror is disclosed. The current mirror circuit has a current path defined by a first current mirror stage driving a second current mirror stage, the second current mirror stage is coupled to a supply voltage sou... | 06/13/2006 |
| 7061276 | Digital phase detector A high performance phase detector includes a local digital oscillator for generating a digital reference signal of programmable frequency and phase. The phase detector accumulates a difference in phase between the digital reference signal and a sampled input signal ... | 06/13/2006 |
| 7061286 | Synchronization between low frequency and high frequency digital signals A synchronization circuit for synchronizing low frequency digital circuitry and high frequency digital circuitry. The synchronization circuit produces an ordered series of clocks from the high-frequency digital clock. The clocks have a deterministic time relationshi... | 06/13/2006 |
| 7049577 | Semiconductor handler interface auto alignment A test cell for use in a semiconductor manufacturing operation allowing alignment of semiconductor devices to be tested to a test station. The test cell is well suited for testing semiconductor devices on carrier strips. To aid in alignment, the test cell includes a... | 05/23/2006 |
| 7048585 | High speed connector assembly There is disclosed a two-piece electrical connector assembly having a first electrical connector and a second electrical connector. The first electrical connector includes a plurality of first signal conductors disposed along first and second sides of a first insula... | 05/23/2006 |
| 7046027 | Interface apparatus for semiconductor device tester A signal interface to connect a semiconductor tester to a device under test. The Interface includes a generic component and customized component. The generic component includes multiple copies of electronic elements that can be connected in signal paths between the ... | 05/16/2006 |
| 7042983 | Method and apparatus for bridged tap impact analysis A method and system for qualifying telephone lines for high speed data services. The system takes measurements on a line under test and matches those measurements to a model of a line. The model of the line is used to predict whether the line will support data servi... | 05/09/2006 |
| 7023366 | Using a parametric measurement unit for converter testing In one aspect, the invention is an integrated circuit (IC) for use in testing an analog-to-digital (ADC) converter includes a first channel of a parametric measurement unit (PMU) configured to send a force signal to the ADC. The IC also includes a first digital-to-a... | 04/04/2006 |
