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Pizza Pie With Concentric Rings of Crust
A pizza mold for forming a plurality of concentric raised ridges of dough (i.e., crust) on the surface of a pizza pie.
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| Number | Title | Issue Date |
| 6195754 | Method and apparatus for tolerating power outages of variable duration in a multi-processor system An apparatus and method for tolerating failure of the AC power source in a power supply switchable between the AC power source and a battery, in a processor system having a set of one or more components subject to being powered down. When the failure of t... | 02/27/2001 |
| 6192433 | Automatic SCSI termination readjustment An on line serviceable computing system employing a small computer system interface (SCSI) bus architecture connecting two host computers to at least one additional shared device including a termination adapter circuit that can sense when a SCSI terminati... | 02/20/2001 |
| 6189023 | Simulating shared code thread modules with shared code fibers A computer program product simulates shared code threads with Windows NT fibers. Computer code is included for reusing shared code threads which complete.... | 02/13/2001 |
| 6189111 | Resource harvesting in scalable, fault tolerant, single system image clusters A method is presented that enhances the survivability of system software components, even in the event of catastrophic failure of the computing element on which they reside. In particular, the combination of a distributed operating system (Non Stop Cluste... | 02/13/2001 |
| 6175882 | Network system for a first module port auto configuring same mode as a second module port A system and technique of auto-configuring a first module to be in the same mode as a second module includes testing the frequency of a clock signal received from the second module to determine its mode of operation. The first module then auto-configures ... | 01/16/2001 |
| 6173249 | Method of determining termination of a process under a simulated operating system An operating system is simulated to run in conjunction with a native operating system, allowing processes originally developed for the operating system being simulated to be ported to the environment of the native operating system with a minimum of effort... | 01/09/2001 |
| 6163834 | Two level address translation and memory registration system and method A two-level memory region registration and address translation method includes a memory handle table and a translation and protection table (TPT). Each memory region registered is associated with a unique memory handle index which accesses one entry of th... | 12/19/2000 |
| 6157967 | Method of data communication flow control in a data processing system using busy/ready commands A multiprocessor system includes a number of sub-processor systems, each substantially identically constructed, and each comprising a central processing unit (CPU), and at least one I/O device, interconnected by routing apparatus that also interconnects t... | 12/05/2000 |
| 6157959 | Method and apparatus for providing portable kernel-mode support for fast interprocess communication A method and apparatus for providing kernel mode support for fast IPC between a client process and a server process. A client application accesses a kernel mode of an operating system via a device driver or similar method. The client creates an abstract "... | 12/05/2000 |
| 6151689 | Detecting and isolating errors occurring in data communication in a multiple processor system A multiprocessor system includes a number of sub-processor systems, each substantially identically constructed, and each comprising a central processing unit (CPU), and at least one I/O device, interconnected by routing apparatus that also interconnects t... | 11/21/2000 |
| 6151684 | High availability access to input/output devices in a distributed system A system area network computer system architecture is structured as a single system image cluster operating system to offer an opportunity to increase the availability to I/O devices in the system. The computing system comprises a number of processor unit... | 11/21/2000 |
| 6145061 | Method of management of a circular queue for asynchronous access A circular queue is asynchronously accessed and managed by two separate processing elements. Each data element is added to the queue together with a zero data element that both marks the tail of the queue and signifies that the queue is empty. Data elemen... | 11/07/2000 |
| 6092177 | Computer architecture capable of execution of general purpose multiple instructions A system for issuing a family of instructions during a single clock includes a decoder for decoding the family of instructions and logic, responsive to the decode result, for determining whether resource conflicts would occur if the family were issued dur... | 07/18/2000 |
| 6092213 | Fault tolerant method of maintaining and distributing configuration information in a distributed processing system A computing system in the form of a cluster of a number of multiprocessing nodes maintains, in a fault tolerant manner, a distribution of configuration data for each of the nodes so that each node has a database containing the configuration data associate... | 07/18/2000 |
| 6065045 | Method and apparatus for object reference processing A preferred embodiment of the present invention includes a method and apparatus for sending messages between memory spaces included in a computer network. More specifically, for a preferred embodiment, each memory space included in a computer network is i... | 05/16/2000 |
| 6041420 | Multi-volume audit trails for fault tolerant computers A fault tolerant computer system distributes audit trail files containing audit records, across an arbitrary number of disk volumes. After one audit trail file becomes full, audit records are directed toward a next audit trail file stored on a different d... | 03/21/2000 |
| 6035262 | Real time observation serial scan test architecture Logic circuitry in the form of an integrated circuit includes a number of scannable registers located at various locations of the logic circuitry to continuously sample signal states thereat. In response to signalling from a maintenance diagnostic process... | 03/07/2000 |
| 6031993 | Method and apparatus for translating source code from one high-level computer language to another A method, system, apparatus, and program for translating one computer language to another using doubly-rooted tree data structures. A doubly-rooted tree is the combination of two sets of hierarchically related objects sharing a common set of leaves. An N-... | 02/29/2000 |
| 6029263 | Interconnect testing using non-compatible scan architectures A method is provided that provides a test of an interconnect that communicates information between two digital circuits. One of the digital circuits is constructed to be "scannable" so that it at least includes scannable registers capable of applying sign... | 02/22/2000 |
| 6009506 | Computer architecture capable of concurrent issuance and execution of general purpose multiple instructions A system for issuing a family of instructions during a single clock includes a decoder for decoding the family of instructions and logic, responsive to the decode result, for determining whether resource conflicts would occur if the family were issued dur... | 12/28/1999 |
| 6006031 | Method and apparatus for reconciling conflicting translations by factoring and parameterizing differences A method and apparatus for translating source code written in one computer language to source code written in another language wherein translated static fragments are generated in the face of textual inconsistencies. Exactly one target language definition... | 12/21/1999 |
| 6002851 | Method and apparatus for node pruning a multi-processor system for maximal, full connection during recovery A method and apparatus for achieving maximal, full connection in a multi-processor system having a plurality of processors. Each of the multiple processors has a respective memory. The invention includes communicatively connecting the processors. Followin... | 12/14/1999 |
| 5991518 | Method and apparatus for split-brain avoidance in a multi-processor system A split brain avoidance protocol to determine the group of processors that will survive a complete partitioning (disconnection) in the inter-processor communications paths connecting processors in a multi-processor system. Processors embodying the inventi... | 11/23/1999 |
| 5983019 | Method and system for providing interpretive access to an object system An interpretive language is initialized to include code that provides a bridge to an object-oriented environment. The interpretive language includes a command library to which are added commands that use the bridge to produce object instances and to emplo... | 11/09/1999 |
| 5983269 | Method and apparatus for configuring routing paths of a network communicatively interconnecting a number of processing elements A multiple processing system, comprises at least a pair of processor units communicatively connected to a number of peripheral devices through a network that includes routing devices interconnected to route information in the form of message packets sent ... | 11/09/1999 |
| 5978914 | Method and apparatus for preventing inadvertent changes to system-critical files in a computing system System-critical files are protected from being inadvertently modified or deleted by placing them in a Reserve name space of storage that requires any process seeking modifying access to the Reserve name space to have a "Right" to do so. The right to modif... | 11/02/1999 |
| 5974574 | Method of comparing replicated databases using checksum information A method of checking a large and/or replicated databases includes forming a position sensitive checksum for each entry of the database to be used in the check. The checksums are then exclusive Ored with one another to form a first database checksum. Perio... | 10/26/1999 |
| 5968134 | Distributed pipes and fifos in a multiprocessor A multiprocessor that includes a virtual file system providing a file system interface to user application code. This interface allows users to access files in many types of file systems in a consistent, file system-independent manner. In a preferred embo... | 10/19/1999 |
| 5964838 | Method for sequential and consistent startup and/or reload of multiple processor nodes in a multiple node cluster A computing system comprising a number of multiple processor unit nodes interconnectively connected by a communications system to form a cluster is initialized in a manner that creates separate, independent execution environments for each processor unit. ... | 10/12/1999 |
| 5964835 | Storage access validation to data messages using partial storage address data indexed entries containing permissible address range validation for message source A multiprocessor system includes a number of central processing unit (CPUs) and at least one input/output (I/O) device interconnected by routing apparatus for communicating packetized messages therebetween. The messages contain address information identif... | 10/12/1999 |
| 5959840 | Apparatus for cooling multiple printed circuit board mounted electrical components An electrical component, mounted for example to a printed circuit board, is enclosed in a sealed chamber with an inert gas that permits the electrical leads of the electrical component to be formed from a material having high heat and electrical conductiv... | 09/28/1999 |
| 5954794 | Computer system data I/O by reference among I/O devices and multiple memory units An apparatus and method for getting descriptors to data and passing the descriptors among data sources and sinks, thereby avoiding copying the data among the data sources and sinks. The data source/sink which consumes the data actual initiates the copying... | 09/21/1999 |
| 5951703 | System and method for performing improved pseudo-random testing of systems having multi driver buses A digital system includes a number of digital subsystems interconnected by a shared bus structure that is mutually exclusively accessible for communicating data between the subsystems. The system is structured to be tested by pseudo-random scan test metho... | 09/14/1999 |
| 5948111 | Real time comparison of integrated circuit operation A pair of substantially identical integrated circuit elements, in the form of microprocessors, are operated in response to the same instruction and data signals that are accessed from a memory by one of the integrated circuits. The accessed instruction an... | 09/07/1999 |
| 5948108 | Method and system for providing fault tolerant access between clients and a server A method and system for providing a fault tolerant access between network clients and a network server. Accordingly, a preferred embodiment of the present invention, a first primary input/output process (IOP) and a second backup IOP are provided in a firs... | 09/07/1999 |
| 5941959 | System for transferring a data stream to a requestor without copying data segments to each one of multiple data source/sinks during data stream building An apparatus and method for getting descriptors to data and passing the descriptors among data sources and sinks, thereby avoiding copying the data among the data sources and sinks. The data source/sink which consumes the data actual initiates the copying... | 08/24/1999 |
| 5943674 | Data structure representing an interface definition language source file A data structure representing an Interface Definition Language ("IDL") source file is disclosed. The data structure is preferably produced during the compilation of the source file and generation of language-specific source code. The data structure includ... | 08/24/1999 |
| 5931903 | Computer system data I/O by reference among multiple CPUS An apparatus and method for getting descriptors to data and passing the descriptors among data sources and sinks, thereby avoiding copying the data among the data sources and sinks. The data source/sink which consumes the data actual initiates the copying... | 08/03/1999 |
| 5928368 | Method and apparatus for fault-tolerant multiprocessing system recovery from power failure or drop-outs Multiple processors are connected to form a multiprocessor system having interprocessor communicating capability. In the face of a power-fail signal, indicating that possible power loss is imminent, a processor will proceed through a shut-down procedure t... | 07/27/1999 |
| 5930275 | Clock error detection circuit A method and digital circuit for indicating whether the frequencies of two clocks are within a predetermined range of each other, wherein a first pattern of alternating binary one's and zero's is created using the active edge of the first clock; first and... | 07/27/1999 |
