Celebrity Inventors
Glam girl Heddy Lamar may have used her good looks to good effect on the silver screen, but she put her smarts to better use as an inventor. During World War II, she co-patented a frequency-switching system for torpedo guidance that was considered years ahead of its time.
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| Number | Title | Issue Date |
| 5869900 | Sea-of-cells array of transistors The invention concerns integrated circuits in which a MACRO is embedded in a standard cell array. One level of metal is devoted exclusively to non-local interconnect, and a layer of polysilicon is devoted to local interconnect, thereby saving significant ... | 02/09/1999 |
| 5828011 | High voltage stylus for portable computer The invention concerns a stylus for producing a high-voltage, sinusoidal signal for an electrostatic digitizing pad. The high voltage is obtained by applying a sine wave to one lead of the primary of a transformer, and applying the inverse of the sine wav... | 10/27/1998 |
| 5787242 | Method and apparatus for treatment of deferred write data for a dead raid device Methods and apparatus for moving pinned data corresponding to a temporarily dead RAID device between the cache memory of a RAID subsystem and a log area. In response to detection of a dead RAID device within a RAID subsystem, the methods of the present in... | 07/28/1998 |
| 5777509 | Apparatus and method for generating a current with a positive temperature coefficient A bias current generator includes a first circuit component having a first voltage developed across a pair of terminals thereof, the first voltage decreasing as an operating temperature of the first circuit component increases. The bias current generator ... | 07/07/1998 |
| 5777898 | Method and apparatus for aligning a digitizing panel with a display device A method and apparatus for aligning a first coordinate system of a digitizing panel with a second coordinate system of a display device. The method includes the steps of displaying a plurality of reference points on the display device, each of the referen... | 07/07/1998 |
| 5752010 | Dual-mode graphics controller with preemptive video access A method and architecture for a graphics controller chip. The graphics controller has a display memory for storing video and graphics data. It also has a logic controller, connected to the memory, for performing logic operations on data stored in the memo... | 05/12/1998 |
| 5748050 | Linearization method and apparatus for voltage controlled oscillator A voltage controlled oscillator (VCO) having a generally linear transfer characteristic across a wide frequency range of operation. The VCO is comprised of a voltage-to-current converter (V-I) and a current-controlled oscillator (ICO). A linearization of ... | 05/05/1998 |
| 5748871 | Dual bus architecture for a storage device An apparatus includes a first bus, a second bus, and a storage module having a first and second output with the first output being connected to the first bus and a second output being connected to the second bus. A first buffer storage and a second buffer... | 05/05/1998 |
| 5742752 | Method for performing a RAID stripe write operation using a drive XOR command set Method for implementing a stripe write operation in a RAID device having XOR command set enabled disk drives on a common interface bus. The method of the present invention improves upon prior designs which do not use the XOR command set by eliminating the... | 04/21/1998 |
| 5736680 | Polymorphic rectilinear thieving pad A pad is adjacent a hole that will be located on the trailing edge of the board when the board is processed through wave soldering. The pad includes a curved side that faces the hole. In addition, corners are absent from the pad. The intersections of side... | 04/07/1998 |
| 5736833 | Rapid battery charging circuit with overvoltage shunt A circuit for charging a battery comprising a charging source, a transistor and a charge control device for switching the transistor. When saturated and switched on, the transistor permits flow of charge to the battery from the charging source. The charge... | 04/07/1998 |
| 5734848 | Method and appartus for transferring data in a controller having centralized memory A method for transferring data in a controller is disclosed which includes the steps of providing a processor having an internal first bus, providing a second bus, connecting a memory device to the second bus, connecting a disk drive to the second bus, tr... | 03/31/1998 |
| 5728626 | Spin-on conductor process for integrated circuits A method of planarizing a non-planar substrate, such as filling vias and contact holes, spreads a suspension of a conducting material suspended in a liquid on a substrate. The suspension includes an organometallic material, preferably with particles of a ... | 03/17/1998 |
| 5729705 | Method and apparatus for enhancing throughput of disk array data transfers in a controller A method for transferring data in a controller having a processor and a controller support device, with the controller connected to a host device and a disk drive. The method includes the steps of providing the controller with a first bus and a second bus... | 03/17/1998 |
| 5726991 | Integral bit error rate test system for serial data communication links A data communication method and apparatus includes an integral bit error rate test system. The system is adapted to receive digital data signals to be transmitted over a communication link and includes a transmitter for transmitting the data signals onto ... | 03/10/1998 |
| 5721954 | Intelligent SCSI-2/DMA processor A SCSI-2-and-DMA processor that has on a single integrated circuit a SCSI-2 interface for a SCSI-2 data bus that is at least two bytes wide and a DMA interface for a system data bus that is at least two bytes wide. This integrated circuit has an set of co... | 02/24/1998 |
| 5719983 | Method and apparatus for placement of video data based on disk zones A method and apparatus for storing data on a storage device in which the storage device has a plurality of different zones. Each zone in the storage device has a different transfer rate. The present invention places a video having the highest demand in a ... | 02/17/1998 |
| 5701309 | Automated test equipment digital tester expansion apparatus A scan-based logic test apparatus is provided for use with an automated test equipment (ATE) digital tester which tests scan-based logic IC devices. The test apparatus is embodied in a test card which is pluggable into a bus slot within a computer. The co... | 12/23/1997 |
| 5696464 | Output driver adaptable to power supply variation The invention concerns an adaptive driver circuit which can source and sink current when powered by different power supply voltages. The invention maintains the output voltage substantially constant, for a given load, when the voltage of the power supply ... | 12/09/1997 |
| 5684415 | 5 volt driver in a 3 volt CMOS process A CMOS voltage level shifter that is comprised of a pull-up device coupled between a first voltage supply and an node to pull up that node to the voltage of the first voltage supply. The pull-up device is responsive to a first voltage signal. A pull-down ... | 11/04/1997 |
| 5680642 | Method and apparatus for pseudo-aligned transfers of data to memory wherein a re-alignment is performed based on the data byte control header A method and apparatus for pseudo aligned transfers to memory for processors, peripherals and memories. Alignment logic, typically coupled to a peripheral, receives a plurality of data bytes from a processor. The alignment logic uses a control header tran... | 10/21/1997 |
| 5677564 | Shallow trench isolation in integrated circuits The invention concerns fabrication of oxide-filled isolation trenches in integrated circuits. The invention etches a network of trenches in the surface of a uniformly doped wafer which has experienced no substantial processing steps. Such a wafer will hav... | 10/14/1997 |
| 5677642 | Signal generator with supply voltage tolerance A signal generator and method that is tolerable to supply voltage fluctuations and differentials. A current switch is driven that is independent of the supply voltage. By clamping the slewing voltage at the gate of a transistor driver, the difference betw... | 10/14/1997 |
| 5675620 | High-frequency phase locked loop circuit A high-frequency phase locked loop circuit effectively increases the maximum frequency associated with the CMOS technology. The circuit includes a first phase-locked loop sub-circuit having an input and an output, a second phase-locked loop sub-circuit ha... | 10/07/1997 |
| 5672981 | Universal power interface adapter for burn-in board A power interface adapter that provides device power connections in a universal burn-in board system. The power interface adapter is a low-cost printed circuit board which interfaces on a one-to-one basis with each burn-in board device socket, thus provid... | 09/30/1997 |
| 5672905 | Semiconductor fuse and method A semiconductor fuse and method for fabricating the same An insulating layer is provided and a trench formed therein. A fusible link is then formed across the insulating layer and trench and conformal therewith. The link has a break region of minimum thic... | 09/30/1997 |
| 5671397 | Sea-of-cells array of transistors The invention concerns integrated circuits in which a MACRO is embedded in a standard cell array. One level of metal is devoted exclusively to non-local interconnect, and a layer of polysilicon is devoted to local interconnect, thereby saving significant ... | 09/23/1997 |
| 5671365 | I/O system for reducing main processor overhead in initiating I/O requests and servicing I/O completion events Apparatus and associated methods for improving I/O performance in a computing system which includes one or more MPUs and one or more IOPs. I/O requests are queued by a requesting MPU in a memory shared with one or more IOPs. Each IOP is associated with a ... | 09/23/1997 |
| 5668352 | Data compression in digitizing tablet The invention concerns storage of correction tables for digitizing tablets. A digitizing tablet produces data indicative of position of a stylus. The data does not, in general, exactly indicate the position; errors exist. For example, a tablet may produce... | 09/16/1997 |
| 5665845 | Electronic device with a spin-on glass dielectric layer There is provided electronic devices with dielectric layers obtained from boron-oxide doped, spin-on glass formulations which form glassy layers with high oxygen resistance. Suitable electronic devices include integrated circuits. With high oxygen resista... | 09/09/1997 |
| 5661687 | Drain excluded EPROM cell An electrically programmable floating gate memory cell is gate programmed with tunneling electrons and is not drain erasable. The memory cell comprises a semiconductor substrate, source and drain regions disposed in the semiconductor substrate, a floating... | 08/26/1997 |
| 5654537 | Image sensor array with picture element sensor testability A picture element sensor circuit in an image array scanner is tested by driving a reset FET with a controllable voltage to set the reverse-bias voltage across the photo-diode at any selectable level of test voltage. In this way each pixel sensor circuit i... | 08/05/1997 |
| 5648930 | Non-volatile memory which is programmable from a power source An apparatus and method for storing a momentarily applied binary signal in a non-volatile memory cell and for automatically returning to a state which is indicative of the applied binary signal upon power-up of the non-volatile memory. In one aspect, the ... | 07/15/1997 |
| 5645736 | Method for polishing a wafer A method is shown for polishing a workpiece such as a semiconductor wafer. A polishing composition is first formed which includes (1) a polishing media particle; and (2) a film forming binder for suspending the particle and forming a temporary film on an ... | 07/08/1997 |
| 5644767 | Method and apparatus for determining and maintaining drive status from codes written to disk drives of an arrayed storage subsystem A method whereby a host computer system is informed of the drive status in a disk array when one or more of the disk drives fail. A data pattern (timestamp or status code) is written on each of the disk drives in service in the array when an event occurs ... | 07/01/1997 |
| 5644336 | Mixed format video ram The invention concerns the simultaneous display of video data and text data on a computer display. The invention stores both types of data in display memory. Transition codes mark the separation between the two types. The invention converts each type of d... | 07/01/1997 |
| 5644786 | Method for scheduling the execution of disk I/O operations A procedure for scheduling multiple process requests for read/write access to a disk memory device within a computer system. The procedure considers disk characteristics, such as the number of sectors per track, the number of tracks per cylinder, speed of... | 07/01/1997 |
| 5634033 | Disk array storage system architecture for parity operations simultaneous with other data operations A high performance scaleable hardware architecture for a disk array storage subsystem which supports RAID modes 0, 3, 4 and 5. The architecture features a high bandwidth parity calculation engine, a buffered PCI interface operating at the full speed of th... | 05/27/1997 |
| 5625405 | Architectural arrangement for a video server A Video-On-Demand (VOD) system including a plurality of video storage devices; an asynchronous transfer mode (ATM) telephony technology network connected to provide video data to a plurality of subscribers; and a unique video server coordinating the conve... | 04/29/1997 |
| 5617102 | Communications transceiver using an adaptive directional antenna A directional antenna connected to a portable communications transceiver is adaptively directed towards a remote station in a communication system. The amount of RF power required by the portable device is significantly reduced, relative to a non-directio... | 04/01/1997 |
