Bizarre Patents
A gun that fires a missile, powered by gas "discharged by the operator of the toy."
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8166214 | Shared storage for multi-threaded ordered queues in an interconnect In one embodiment, payload of multiple threads between intellectual property (IP) cores of an integrated circuit are transferred, by buffering the payload using a number of order queues. Each of the queues is guaranteed access to a minimum number of buffer entries t... | 04/24/2012 |
| 8108648 | Various methods and apparatus for address tiling Various methods and apparatus are described for a memory scheduler. The memory scheduler couples to a target memory core that includes a bank of memories. The memory scheduler contains two or more configurable address tiling functions to transform an incoming addres... | 01/31/2012 |
| 8073820 | Method and system for a database to monitor and analyze performance of an electronic design Various methods and apparatuses are described that provide instrumentation and analysis of an electronic design having one or more bus interconnects. A relational database may have defined tables designed for interconnect analysis of transactions occurring between i... | 12/06/2011 |
| 8032676 | Methods and apparatuses to manage bandwidth mismatches between a sending device and a receiving device Embodiments of apparatuses, systems, and methods are described for communicating information between functional blocks of a system across a communication fabric. Rate logic may couple to the communication fabric. The rate logic is configured to determine a data band... | 10/04/2011 |
| 8032329 | Method and system to monitor, debug, and analyze performance of an electronic design Various methods and apparatuses are described that provide instrumentation and analysis of an electronic design. A performance monitoring apparatus may be located on an interconnect of a fabricated integrated circuit. An event measurement module (EM) includes an eve... | 10/04/2011 |
| 8024697 | Various methods and apparatuses for estimating characteristics of an electronic systems design Methods and apparatuses are described for an Intellectual Property (IP) Generator for estimating timing, area, and power characteristics of an electronic system design. The IP Generator receives a user-supplied file having data describing a configuration of an IP de... | 09/20/2011 |
| 8020124 | Various methods and apparatuses for cycle accurate C-models of components Various methods and apparatuses are described for generating a model of hardware components making up an interconnect that facilitates communications between Intellectual Property blocks in an integrated circuit coded in a software programming language at a high lev... | 09/13/2011 |
| 7814243 | Shared storage for multi-threaded ordered queues in an interconnect In one embodiment, payload of multiple threads between intellectual property (IP) cores of an integrated circuit are transferred, by buffering the payload using a number of order queues. Each of the queues is guaranteed access to a minimum number of buffer entries t... | 10/12/2010 |
| 7739436 | Method and apparatus for round robin resource arbitration with a fast request to grant response Various methods and apparatuses are described for an arbitration unit that implements a round robin policy. Each requesting device has an equal chance of accessing a shared resource based upon a current request priority assigned to that requesting device. The arbitr... | 06/15/2010 |
| 7694249 | Various methods and apparatuses for estimating characteristics of an electronic system's design Methods and apparatuses are described for an Intellectual Property (IP) Generator for estimating timing, area, and power characteristics of an electronic system design. The IP Generator receives a user-supplied file having data describing a configuration of an IP de... | 04/06/2010 |
| 7665069 | Method and apparatus for establishing a quality of service model In general, methods and apparatus for implementing a Quality of Service (QoS) model are disclosed. A Quality of Service (QoS) contract with an initiating network device may be satisfied. A request may be received from the initiating network device in a first time le... | 02/16/2010 |
| 7660932 | Composing on-chip interconnects with configurable interfaces Embodiments of apparatuses, systems, and methods are described for a machine-readable medium having instructions stored thereon, which, when executed by a machine, to cause the machine to generate a representation of an apparatus. The apparatus includes a bridge age... | 02/09/2010 |
| 7647441 | Communications system and method with multilevel connection identification An embodiment includes a communication medium coupled to a plurality of the functional blocks in an integrated circuit. Three or more of the initiator functional blocks communicate with a target functional block by sending requests having an associated identifier to... | 01/12/2010 |
| 7603441 | Method and apparatus for automatic configuration of multiple on-chip interconnects A method and apparatus for automatic configuration of multiple on-chip interconnects have been described. In one embodiment, the invention reduces the configuration time of several on-chip network features, and also ensures that these features are configured correct... | 10/13/2009 |
| 7543088 | Various methods and apparatuses for width and burst conversion Methods and apparatuses are described for a communication system. The communication system comprises an initiator core supporting a first burst capability as well as a target core supporting a second burst capability. The supported burst features of the second burst... | 06/02/2009 |
| 7475168 | Various methods and apparatus for width and burst conversion Methods and apparatuses are described for a communication system. The communication system may include one or more initiator agents, where each agent couples to its own Intellectual Property core. The communication system may also include two or more target agents, ... | 01/06/2009 |
| 7412670 | Method and apparatus for optimizing distributed multiplexed bus interconnects Methods and apparatuses for optimizing distributed multiplexed bus interconnects are described. Parameters of components that make up a distributed multiplexed bus interconnect may be optimized, such as an amount of area on a chip occupied by the component, an amoun... | 08/12/2008 |
| 7356633 | Composing on-chip interconnects with configurable interfaces Embodiments of apparatuses, systems, and methods are described for composing on-chip interconnects with configurable interfaces. A configurable interface includes a configurable agent and interface port. The configurable agent has a first input and a first output wi... | 04/08/2008 |
