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| Number | Title | Issue Date |
| 7732913 | Semiconductor package substrate A semiconductor package substrate is provided, which includes a substrate body having a plurality of conductive through holes formed therein, wherein at least two adjacent conductive through holes are formed as a differential pair, each of which has a ball pad forme... | 06/08/2010 |
| 7655503 | Method for fabricating semiconductor package with stacked chips A semiconductor package with stacked chips and a method for fabricating the same are proposed. The semiconductor package includes a lead frame having a plurality of leads and supporting extensions; at least one preformed package having an active surface, and a non-a... | 02/02/2010 |
| 7535091 | Multichip stacking structure A multichip stacking structure is provided, including a chip carrier; a plurality of semiconductor chips stacked on the chip carrier in a stepped manner that an overlying chip mounted on an underlying chip of the plurality of semiconductor chips has a suspended port... | 05/19/2009 |
| 7521285 | Method for fabricating chip-stacked semiconductor package A chip-stacked semiconductor package and a method for fabricating the same are proposed. A chip carrier module plate including a plurality of chip carriers, and a heat sink module plate including a plurality of heat sinks are provided, wherein a plurality of through... | 04/21/2009 |
| 7508066 | Heat dissipating semiconductor package and fabrication method thereof A heat dissipating semiconductor package and a fabrication method thereof are provided. A semiconductor chip is mounted on a chip carrier. A heat sink is mounted on the chip, and includes an insulating core layer, a thin metallic layer formed on each of an upper sur... | 03/24/2009 |
| 7489037 | Semiconductor device and fabrication method thereof A semiconductor device and a fabrication method thereof are proposed. A first dielectric layer is formed on a semiconductor substrate having at least one bond pad, wherein the first dielectric layer has a first opening for exposing the bond pad and a second opening ... | 02/10/2009 |
| 7489044 | Semiconductor package and fabrication method thereof The present invention provides a semiconductor package and a fabrication method thereof. The method includes the steps of: providing a chip carrier module having a plurality of chip carriers, disposing a plurality of electrical connecting points on the chip carriers... | 02/10/2009 |
| 7485496 | Semiconductor device package with a heat sink and method for fabricating the same A semiconductor package with a heat sink and a method for fabricating the same are proposed. A first adhesive of a low Young's modulus is disposed on a corner region of a heat sink mounting area of a substrate. A second adhesive of a high Young's modulus is disposed... | 02/03/2009 |
| 7446307 | Sensor semiconductor device and fabrication method of the sensor semiconductor device A sensor semiconductor device and a fabrication method thereof are provided. The fabrication method includes mounting a sensor chip on a surface of a substrate; forming a transparent cover on the sensor chip; forming a dielectric layer and a circuit layer on the sub... | 11/04/2008 |
| 7445957 | Method for fabricating wafer level semiconductor package with build-up layer A wafer level semiconductor package with a build-up layer is provided, which includes a glass frame having a through hole for receiving a semiconductor chip therein, a low-modulus buffer material filled within the space formed between the semiconductor chip and the ... | 11/04/2008 |
| 7423340 | Semiconductor package free of substrate and fabrication method thereof A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in t... | 09/09/2008 |
| 7402755 | Circuit board with quality-indicator mark and method for indicating quality of the circuit board A circuit board with a quality-indicator mark and a method for indicating quality of the circuit board. The circuit board includes a plurality of circuit board units. A plating bus is formed around each circuit board unit and extended to form a plating trace in an i... | 07/22/2008 |
| 7371617 | Method for fabricating semiconductor package with heat sink A semiconductor package with a heat sink and a method for fabricating the same are proposed. The heat sink is provided with a rigid and thermally resistant detach member on a top surface thereof, and is attached via its bottom surface to a chip mounted on a chip car... | 05/13/2008 |
| 7364944 | Method for fabricating thermally enhanced semiconductor package A thermally enhanced semiconductor package and a fabrication method thereof are provided. A plurality of conductive bumps are formed on bond pads on an active surface of a chip. A heat sink is attached to an inactive surface of the chip and has a surface area larger... | 04/29/2008 |
| 7364948 | Method for fabricating semiconductor package A semiconductor package and a fabrication method thereof are proposed. A lead frame is provided between a chip and a substrate in a window ball grid array semiconductor package, wherein an active surface of the chip is electrically connected to the lead frame via bo... | 04/29/2008 |
| 7361846 | High electrical performance semiconductor package A high electrical performance semiconductor package is proposed. A carrier is provided having a first surface, an opposite second surface, and conductive vias for electrically connecting the first surface to the second surface. A chip is attached to the first surfac... | 04/22/2008 |
| 7354796 | Method for fabricating semiconductor package free of substrate A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in t... | 04/08/2008 |
| 7355279 | Semiconductor device and fabrication method thereof A semiconductor device and a fabrication method thereof are provided. A semiconductor substrate having a plurality of bonding pads is prepared, and a first passivation layer, a second passivation layer and a metallic layer are successively formed on the semiconducto... | 04/08/2008 |
| 7348211 | Method for fabricating semiconductor packages A method for fabricating semiconductor packages is proposed. A plurality of substrates each having a chip thereon are prepared. Each substrate has similar length and width to the predetermined length and width of the semiconductor package. A carrier having a plurali... | 03/25/2008 |
| 7341949 | Process for forming lead-free bump on electronic component A process for forming a lead-free bump on an electronic component includes preparing the electronic component with at least one bond pad and a passivation layer formed thereon; forming an under bump metallurgy (UBM) structure on the passivation layer and the bond pa... | 03/11/2008 |
| 7342318 | Semiconductor package free of substrate and fabrication method thereof A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in t... | 03/11/2008 |
| 7342304 | Semiconductor package with heat dissipating structure A semiconductor package with a heat dissipating structure is provided. The heat dissipating structure includes a flat portion, and a plurality of support portions formed at edge corners of the flat portion for supporting the flat portion above a chip mounted on a su... | 03/11/2008 |
| 7339280 | Semiconductor package with lead frame as chip carrier and method for fabricating the same A semiconductor package with a lead frame as a chip carrier and a method for fabricating the same are provided. The lead frame includes a die pad and a plurality of leads properly spaced apart from the die pad, each lead being composed of an inner lead portion and a... | 03/04/2008 |
| 7314820 | Carrier-free semiconductor package and fabrication method thereof A carrier-free semiconductor package and a fabrication method thereof are provided. The fabrication method includes the steps of: providing a carrier having a plurality of electrical contacts formed thereon; mounting at least one chip on the carrier; electrically co... | 01/01/2008 |
| 7315078 | Chip-stacked semiconductor package and method for fabricating the same A chip-stacked semiconductor package and a method for fabricating the same are proposed. A chip carrier module plate including a plurality of chip carriers, and a heat sink module plate including a plurality of heat sinks are provided, wherein a plurality of through... | 01/01/2008 |
| 7274088 | Flip-chip semiconductor package with lead frame as chip carrier and fabrication method thereof A flip-ship semiconductor package with a lead frame as a chip carrier is provided, wherein a plurality of leads of the lead frame are each formed with at least a dam member thereon. When a chip is mounted on the lead frame by means of solder bumps, each of the solde... | 09/25/2007 |
| 7271493 | Semiconductor package free of substrate and fabrication method thereof A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in t... | 09/18/2007 |
| 7271483 | Bump structure of semiconductor package and method for fabricating the same A bump structure of a semiconductor package and a method for fabricating the same are provided. The bump structure is used to connect a semiconductor element to a carrier of the semiconductor package. The fabrication method primarily employs an electroplating proces... | 09/18/2007 |
| 7266888 | Method for fabricating a warpage-preventive circuit board A and method for fabricating a warpage-preventive circuit board is provided, wherein a plurality of conductive traces are formed on a surface of an electrically-insulative core layer, and a plurality of discontinuous dummy circuit regions are disposed on the surface... | 09/11/2007 |
| 7247934 | Multi-chip semiconductor package A multi-chip semiconductor package and a fabrication method thereof are provided. At least one first chip is mounted on and electrically connected to an upper surface of a substrate via solder bumps. A preformed package structure having a second chip and a first enc... | 07/24/2007 |
| 7242068 | Photosensitive semiconductor package, method for fabricating the same, and lead frame thereof A photosensitive semiconductor package, a method for fabricating the same, and a lead frame thereof are proposed. The lead frame has a die pad and a plurality of leads, wherein at least one recessed portion is formed at an end of each lead close to the die pad, and ... | 07/10/2007 |
| 7230323 | Ground-enhanced semiconductor package and lead frame for the same A ground-enhanced semiconductor package and a lead frame used in the package are provided. The semiconductor package includes a lead frame having a die pad, a plurality of tie bars connected with and supporting the die pad, a plurality of leads surrounding the die p... | 06/12/2007 |
| 7208825 | Stacked semiconductor packages A semiconductor package and a fabrication method thereof are provided in which a chip is mounted on a substrate, and a dielectric layer is applied over the substrate and chip, with bond fingers formed on the substrate and electric contacts formed on the chip being e... | 04/24/2007 |
| 7205642 | Semiconductor package and method for fabricating the same A semiconductor package and a method for fabricating the same are proposed. A substrate having a first circuit layer, a second circuit layer, and a core layer formed between the first and second circuit layers is provided. At least one second opening is formed on th... | 04/17/2007 |
| 7205674 | Semiconductor package with build-up layers formed on chip and fabrication method of the semiconductor package A semiconductor package with build-up layers formed on a chip and a fabrication method of the semiconductor package are provided. A chip with a plurality of conductive bumps formed on bond pads thereof is received within a cavity of a carrier, and a dielectric layer... | 04/17/2007 |
| 7203072 | Heat dissipating structure and semiconductor package with the same A heat dissipating structure and a semiconductor package with the same are proposed. A substrate is used to accommodate at least one chip thereon, and the chip is electrically connected to the substrate. A heat dissipating structure having a flat portion and a suppo... | 04/10/2007 |
| 7199453 | Semiconductor package and fabrication method thereof A semiconductor package and a fabrication method thereof are proposed. A lead frame is provided between a chip and a substrate in a window ball grid array semiconductor package, wherein an active surface of the chip is electrically connected to the lead frame via bo... | 04/03/2007 |
| 7199459 | Semiconductor package without bonding wires and fabrication method thereof A semiconductor package without bonding wires and a fabrication method are provided. The semiconductor package includes a substrate having a front surface and a back surface, two chips formed on the front surface, two dielectric layers formed on the chips respective... | 04/03/2007 |
| 7196414 | Semiconductor package with heat sink A semiconductor package with a heat sink is provided in which at least one chip is mounted on the substrate and covered by a heat sink. The heat sink is formed with a plurality of grooves or holes at positions in contact with the substrate, allowing an adhesive mate... | 03/27/2007 |
| 7193309 | Semiconductor package with stacked chips and method for fabricating the same A semiconductor package with stacked chips and a method for fabricating the same are proposed. The semiconductor package includes a lead frame having a plurality of leads and supporting extensions; at least one preformed package having an active surface, and a non-a... | 03/20/2007 |
