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| Number | Title | Issue Date |
| 6112125 | Self-tuning method and apparatus for continuous-time filters A self-tuning technique for integrated continuous-time filters. The present invention provides a method and apparatus to compensate for post-fabrication or in-operation discrepancies between desired and measured filter characteristics due to variability o... | 08/29/2000 |
| 6097320 | Encoder/decoder system with suppressed error propagation A magnetic recording system with a rate 16/17(0,6/8) encoder/decoder modulation code. This modulation code has a low k constraint for synchronization of a road clock of the magnetic recording system. Furthermore, this magnetic recording system has a low h... | 08/01/2000 |
| 6075234 | Non-contact method and apparatus to obtain a timing signal from internal integrated circuit nodes A method and apparatus for triggering integrated circuit test equipment. More particularly, a method and apparatus for triggering integrated circuit test equipment by detecting photon energy emitted from a switching transistor on the integrated circuit. A... | 06/13/2000 |
| 6067335 | Read channel IC for dual PLL solution The present invention discloses a fully integrated data synchronization circuit for a disk drive read channel system. The data synchronization system comprises dual data synchronizers to provide read reference clocks. Dual PLL circuits are coupled to the ... | 05/23/2000 |
| 6043944 | Method and apparatus for failsafing and extending range for write precompensation The present invention prevents catastrophic failures of a write precompensation circuit from occurring without limiting the precompensation range to a small value and also extends the range of precompensation beyond limits imposed by the duty cycle of the... | 03/28/2000 |
| 5995561 | Method and apparatus for reducing noise correlation in a partial response channel A method and apparatus for reducing noise correlation in a partial response channel through optimization of a look-ahead maximum likelihood (ML) detector. In the method of the present invention, the ML detector is optimized in light of the noise correlati... | 11/30/1999 |
| 5917859 | Method and apparatus for implementing a viterbi detector for PRML channels An improved Viterbi detector for use in a partial-response maximum-likelihood (PRML) channel. The present invention reduces the amount of hardware necessary in the conventional digital implementation, as well as increasing the speed of the system, by util... | 06/29/1999 |
| 5914827 | Method and apparatus for implementing a noise generator in an integrated circuit disk drive read channel A method and apparatus for implementing a noise generator in an integrated circuit read channel to optimize the performance of the signal channel. In the preferred embodiment resistors are used to generate noise. The noise source is buffered and the noise... | 06/22/1999 |
| 5890390 | Method and apparatus for mounting, inspecting and adjusting probe card needles A method and apparatus for mounting, inspecting, and adjusting probe card needles used during testing of fabricated circuits. A build wafer, comprised of build and scrub target patterns, is used to mount and re-work probe needle assemblies onto a probe ca... | 04/06/1999 |
| 5866941 | Ultra thin, leadless and molded surface mount integrated circuit package The present invention is an integrated circuit package that comprises a substrate whose top side has a number of conductive and insulative portions. A die on which an integrated circuit is fabricated is placed on the top side of the substrate. A number of... | 02/02/1999 |
| 5726650 | Adaptive manchester decoding with adjustable delay and power saving mode A method and apparatus for recovering clock and data signals from a Manchester code is provided. The present invention uses a phase lock loop with a digital delay line wherein an adjustable delay is introduced into the Manchester coded signal for synchron... | 03/10/1998 |
| 5654984 | Signal modulation across capacitors A method and apparatus for communicating a modulated signal across an isolation barrier using capacitors is provided. The present invention allows low distortion communication of an audio signal across an isolation barrier without the need for a large and... | 08/05/1997 |
| 5602912 | Telephone hybrid circuit A method and apparatus for providing a telephone hybrid function is provided. The present invention maximizes dynamic range while providing a receive signal without interference from a transmit signal. The present invention also provides single-ended to d... | 02/11/1997 |
| 5587687 | Multiplier based transconductance amplifiers and transconductance control circuits Multiplier based transconductance amplifiers utilizing the combination of FET differential input stages and Gilbert multiplier output stages are disclosed. The amplifiers provide a high input resistance, high output resistance, and wide gm adju... | 12/24/1996 |
| 5564061 | Reconfigurable architecture for multi-protocol data communications having selection means and a plurality of register sets The present invention provides a configurable architecture for serial communications. The architecture can emulate parallel to serial conversion devices for both synchronous and asynchronous data transmission. The invention uses a plurality of register se... | 10/08/1996 |
| 5561826 | Configurable architecture for serial communication A device for coupling a host computer to a serial communications device. A dual port register set is coupled to the CPU bus of a host computer. The dual port registers receive the control signals and data from the host computer. This information is immedi... | 10/01/1996 |
| 5561660 | Offset and phase correction for delta-sigma modulators The present invention discloses method and apparatus for offset and phase correction in multiplexed delta-sigma modulators. According to the invention, offsets and phases of input signals to multiplexed delta-sigma modulators are corrected by a simple and... | 10/01/1996 |
| 5556507 | Multifunctional contactless interconnect technology The present invention is a method for providing multifunctional, contactless, interconnect technology that can simultaneously fabricate four features on a silicon wafer within the same metallization level including a diffusion barrier layer, a trim elemen... | 09/17/1996 |
| 5550512 | Method for offset voltage trim for automatic gain controls A method for providing DC offset trim for automatic gain controls independent of temperature or gain. A DC trim current is added or subtracted from one side of the differential AGC circuit. The trim current balances the currents through the two halves of ... | 08/27/1996 |
| 5546027 | Peak detector The peak voltage detector according to the present invention includes (a) an input and output terminals, (b) a comparator for comparing the input terminal voltage to the output terminal voltage, (c) a hold capacitor coupled to the output terminal, and (d)... | 08/13/1996 |
| 5533053 | Low frequency common mode rejection in a clock circuit A method and apparatus for passing a high frequency signal across an isolation barrier while rejecting low frequency common mode interference is provided. A high frequency signal is coupled across an isolation barrier. A circuit comprising an element havi... | 07/02/1996 |
| 5525928 | Filter boost preattenuator A filter boost preattenuator provides controlled, rapid variable signal preattenuation at the input of a filter to optimally compensate for the absolute gain increase of the filter caused by increasing the high frequency boost level of the filter. The amp... | 06/11/1996 |
| 5517146 | Write precompensation circuit for compensating nonlinear magnetic effects in a recording channel In accordance with the invention, a system which compensates nonlinear bit shift is provided for a high-rate constant density recording device. The invention's apparatus generates a programmable write precompensation delay that is an accurate percentage o... | 05/14/1996 |
| 5506900 | Temperature compensation for trans-hybrid loss in a miniaturized data access arrangement Method and apparatus for temperature compensation of transhybrid loss in a data access arrangement (DAA) is provided. A thermal compensation device is situated in proximity to a thermally sensitive device. If devices which dissipate substantial power caus... | 04/09/1996 |
| 5500894 | Telephone line interface with AC and DC transconductance loops A method and apparatus for providing a telephone line interface having selectable termination characteristics, such as impedance parameters, is provided using AC and DC transconductance loops. The present invention may be used with modem apparatus to prov... | 03/19/1996 |
| 5479126 | Method and apparatus for programmable damping factor of a phase locked loop A timing acquisition circuit using a phase locked loop with programmable damping for either Type A or Type B phase detectors is described. In the damping scheme for a Type A phase detector, a resistance (R1) is simulated by adding an equivalent voltage Ve... | 12/26/1995 |
| 5471169 | Circuit for sinking current with near-ground voltage compliance The present invention is a closed-loop peak detection circuit comprising switching means, comparing means, control means, two current sources, and a holding capacitor. The switching means selectively provides one of a plurality of input signals to the com... | 11/28/1995 |
| 5469398 | Selectable width, brustable FIFO A selectable width, burstable FIFO is described. A register memory stores x-bit and y-bit data. Each register of the register memory is y+1 bits wide. Y bits store x-bit and y-bit data and 1-bit tracks the data width within each register. A Burst Ready Lo... | 11/21/1995 |
| 5467370 | Method and apparatus for an adaptive three tap transversal equalizer for partial-response signaling An improved adaptive three tap transversal equalizer for partial-response signaling. The invention reduces the complexity of the hardware, as well as reducing the sensitivity of the equalizer to gain and timing errors. The present invention employs an alg... | 11/14/1995 |
| 5465059 | Method and apparatus for timing acquisition of partial response class IV signaling A method and apparatus for timing acquisition of partial response class IV Signaling is described. The invention uses an acquisition logic block to determine an output sequence that best matches a preamble pattern. The logic block analyzes current quantiz... | 11/07/1995 |
| 5434800 | Programmable system for the synchronization of an electronic angular position indicator A programmable system synchronizes the operation of an electronic angular position indicator with the angular displacement of a rotor. The system can synchronize operation with rotors with non-uniform mark spacing. A sensor provides the system with electr... | 07/18/1995 |
| 5432475 | Method of offset voltage trim for automatic gain controls A method for providing DC offset trim for automatic gain controls independent of temperature or gain. A DC trim current is added or subtracted from one side of the differential AGC circuit. The trim current balances the currents through the two halves of ... | 07/11/1995 |
| 5428307 | Closed-loop peak detector topology The present invention is a closed loop peak detection circuit comprising switching means, comparing means, control means, two current sources, and a holding capacitor. The switching means selectively provides one of a plurality of input signals to the com... | 06/27/1995 |
| 5416437 | Dual mode charge pump for automatic gain control circuits A dual mode charge pump for an AGC circuit is described. The charge pump of the present invention provides normal and accelerated rates of charge and discharge of a capacitor used to control the gain of an AGC amplifier. Current sources for providing acce... | 05/16/1995 |
| 5404054 | Method and apparatus for controlling programmable hysteresis The present invention provides dynamic hysteresis for threshold detection circuitry. The hysteresis decay pattern, rate of decay, and minimum separation between the HSP and LSP are programmable. In particular, the hysteresis decay pattern may be programme... | 04/04/1995 |
| 5397978 | Current limit circuit for IGBT spark drive applications An improved method for current limiting applications to control the current through MOSFETs or IGBTs. An amplifier having a single, high-frequency pole is used to drive the large gate capacitance of a power MOSFET or IGBT. The current in the power transis... | 03/14/1995 |
| 5386328 | Current mirror based write driver A write driver to operate inductive heads for magnetic recording is disclosed. The inductive recording head is coupled between first and second outputs of a first write driver block. The first and second outputs of the first write driver block are coupled... | 01/31/1995 |
| 5384560 | Maximum likelihood sequence metric calculator A maximum likelihood sequence metric calculator for use in a sequence decoder for processing sequences of sampled values from a communication channel or recording device. The metric calculator can be used in a maximum likelihood decoder, where the sequenc... | 01/24/1995 |
| 5382889 | Self-commutating, back-EMF sensing, brushless DC motor controller A method and apparatus to commutate the drive voltages of a brushless DC motor. The present invention determines rotor position and velocity by detecting the polarity reversal of the Back-EMF of an undriven leg when compared to a transformed pseudo-refere... | 01/17/1995 |
| 5374900 | Phase window test circuit The present invention provides a method and an apparatus for controlling and measuring the phase window of a data separator that is suitable for implementation in an automatic test equipment (ATE) system. The test circuit comprising cross-coupled flip-flo... | 12/20/1994 |
