Quotables
"Man will not fly for 50 years."
Wilbur Wright ; 1901
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7397642 | ESD protection circuit An ESD protection circuit is disclosed. The ESD protection circuit includes a stacked MOS circuit, and a trigger current generator. The object of the stacked MOS circuit is to be the first releasing path of the ESD current; the object of the trigger current generato... | 07/08/2008 |
| 7307844 | Heat dissipation mechanism for electronic apparatus This disclosure presents a heat dissipation mechanism, which conducts generated heat of a thermal device to the housing of an electronic apparatus by a metal piece fastened between the thermal device and electronic apparatus, and then dissipates heat into the air th... | 12/11/2007 |
| 7126990 | Method and apparatus for controlling a stereo video display with non-stereo video source An apparatus for controlling a stereo video display with non-stereo video source includes a memory, a read/write controller and a motion analyzer. The memory stores a current frame, a previous frame of the current frame, and a next frame for the current frame that i... | 10/24/2006 |
| 7102466 | Method of reducing switching noise in a power distribution system by external coupled resistive terminators Voltage fluctuations, especially due to a resonant effect of a power distribution system, result in serious timing skews in a high-speed digital system. Adding extra resistive loadings for coupling out the noise into external terminations will reduce a quality facto... | 09/05/2006 |
| 7085016 | Method and apparatus for dithering and inversely dithering in image processing and computer graphics The invention provides a method and an apparatus for dithering, and inversely dithering an image. The apparatus makes use of a pixel address and a pixel data to locate a dither reference value from a dither matrix and use the dither reference value to convert an ori... | 08/01/2006 |
| 7079998 | Method for analyzing power noise and method for reducing the same A method for analyzing power noise and method for reducing the same are disclosed, wherein the present invention is utilized in an IC design process. First, a DC analysis is performed with a related IC design by utilizing computer aided design (CAD) software and cir... | 07/18/2006 |
| 7035339 | Carrier recovery apparatus for digital QAM receivers A carrier recovery apparatus for digital Quadrature Amplitude Modulation (QAM) receivers is disclosed. The carrier recovery apparatus includes a phase detector, a lock controller, a frequency locker and a phase loop filter, and provide phase/frequency error informat... | 04/25/2006 |
| 7020155 | Collision detection method and apparatus for multiple access communication system A collision detection method for a multiple access communication system is disclosed. By using the error term of a time-domain equalized signal as a detection source, an operation on the error term can be performed to determine whether collision occurs. For example,... | 03/28/2006 |
| 6981009 | Apparatus and method for computing a logarithm of a floating-point number An apparatus for computing a logarithm to a base p of a floating-point number X. The floating-point number X is represented in the format of (−1)Sx·2Ex·Mx, where Mx=(1+fx)=(1+Ax·2−K)... | 12/27/2005 |
| 6933600 | Substrate for semiconductor package The invention provides a semiconductor package substrate, which includes a substrate, a chip contact area, an inner pad portion, an outer pad portion and a conductive layer. The chip contact area, the inner pad portion, the outer pad portion and the conductive layer... | 08/23/2005 |
| 6774906 | Method and system of improving silhouette appearance in bump mapping The invention provides a method of improving silhouette appearance in bump mapping, which not only reduces the operation overhead of applying displacement mapping to a whole model but also retains the truly geometric shape in displaying the object silhouette. The in... | 08/10/2004 |
| 6731299 | Apparatus and method for dithering in image processing and computer graphics systems A method for converting N-bit image data of a digital image into M-bit image data, in which N−M=K, K>0, is disclosed. The method is adapted to be used for dithering in an image processing system or a computer graphic system. For example, an N-bit red color value o... | 05/04/2004 |
| 6720235 | Method of forming shallow trench isolation in a semiconductor substrate A method of forming shallow trench isolation in a semiconductor substrate. A hard mask having an opening is formed on the semiconductor substrate. The semiconductor substrate is etched through the opening to form a shallow trench. The semiconductor substrate is anne... | 04/13/2004 |
| 6713379 | Method for forming a damascene structure A method for forming a damascene structure. An insulating layer is deposited on a substrate. A capping layer and a hard mask layer are successively formed on the insulating layer. Subsequently, the hard mask layer is etched to form at least one opening using the cap... | 03/30/2004 |
| 6687399 | Stereo synchronizing signal generator for liquid crystal shutter glasses A stereo synchronizing signal generator for liquid crystal shutter glasses is provided. The stereo synchronizing signal generator includes a signal generating unit to generate preliminary shuttering signals according to an image vertical synchronizing sig... | 02/03/2004 |
| 6596088 | Method for removing the circumferential edge of a dielectric layer A method for removing the circumferential edge of a dielectric layer on a semiconductor wafer is disclosed. First, a semiconductor wafer having a dielectric layer on its upper surface is provided. Second, the semiconductor wafer is placed and secured on a... | 07/22/2003 |
| 6597364 | Method and system for eliminating frame tears from an output display A method and system for rendering computer graphics display tear-free is provided by determining a safe region for each associated block transfer command in real time. In response to a request of a graphics application program, a block transfer type is de... | 07/22/2003 |
| 6578097 | Method and apparatus for transmitting registered data onto a PCI bus A method and apparatus for transmitting registered data onto a PCI bus is provided, which can reduce the delay time of manipulating the outgoing signals without greatly increasing the circuit complexity. The apparatus employee a 2R1W data buffer to send a... | 06/10/2003 |
| 6549991 | Pipelined SDRAM memory controller to optimize bus utilization All memory commands are classified into two categories: background commands and foreground commands, depending on whether they are data related or not. The pointed background command and foreground commands are issued onto the DRAM bus at the earliest tim... | 04/15/2003 |
| 6549157 | Digital-to-analog converting device and method used in home networking system with compensation mechanism to reduce clock jitter A digital-to-analog converting method operating under two clock signals of different periods is disclosed. The method includes steps of monitoring a phase relationship between the two clock signals; starting transmission of a plurality of pre-stored serie... | 04/15/2003 |
| 6515670 | Graphics system and method for minimizing the idle time of a host processor in the graphics system A graphics system minimizes the idle time of a host processor while sending a large amount of graphics instructions in a graphics system. The graphics system includes a host processor, a system memory, a graphics memory and a graphics accelerating device ... | 02/04/2003 |
| 6424189 | Apparatus and system for multi-stage event synchronization The present invention discloses an apparatus and system for multi-stage event synchronization, whose main object is to eliminate the drawbacks of an expensive synchronization circuit used to balance the data transmissions between an origination agent and ... | 07/23/2002 |
| 6410386 | Method for forming a metal capacitor in a damascene process A method for forming a metal capacitor in a damascene process is provided. Before the metal capacitor is formed, the underlying interconnections are fabricated with Cu metal by damascene processes. The capacitor is formed by depositing a first metal layer... | 06/25/2002 |
| 6407595 | Digital clock throttling means A digital clock throttling device, for gating a clock signal of a circuit, at least includes an accumulator and a gating circuit. The accumulator responsive to a throttling value generates a first output signal. The first output signal is divided into a t... | 06/18/2002 |
| 6365970 | Bond pad structure and its method of fabricating A bond pad structure and a method of fabricating such structure are disclosed in the invention. The bond pad structure is formed over a predetermined area defined on a semiconductor substrate. The bond pad structure includes at least two metal layers form... | 04/02/2002 |
| 6358792 | Method for fabricating metal capacitor The present invention provides a method for fabricating a metal capacitor. A first level metal layer is formed on a substrate. Then, the first level metal layer is patterned to concurrently form a first metal line and a second metal line. The second metal... | 03/19/2002 |
| 6327645 | Cache memory system with memory request address queue, cache write address queue, and cache read address queue A cache memory system includes a main memory controller for retrieving memory data from a main memory unit, a cache memory for writing the memory data retrieved by the main memory controller therein, and a tag memory module for detecting presence of a cac... | 12/04/2001 |
| 6317813 | Method for arbitrating multiple memory access requests in a unified memory architecture via a non unified memory controller In a memory controller system, a method for granting a system memory by a memory request arbitrator to a request among a plurality of pending memory access requests is provided. The plurality of the memory access requests includes Rfrsh_Hreq, Crt_Hreq, Gr... | 11/13/2001 |
| 5946703 | Method for reading data in data reading and writing system A method for reading data in a data reading and writing system is disclosed. The method can effectively shorten the data-reading cycle. The method comprises the steps of: (1) providing a clock signal for serving as a pulse source of a synchronous signal f... | 08/31/1999 |
| 5883984 | Method and apparatus for contrast enhancement of color images A method for contrast enhancement of pixel data of a decompressed color image includes the steps of computing I component values in an HSI color space for the pixel data of the color image, computing an image I component value which is an average of the c... | 03/16/1999 |
| 5111428 | High density NOR type read only memory data cell and reference cell network Disclosed is a high density NOR type read only memory data cell and reference cell network, in which every single data cell of the data cell network is comprised of a MOSFET the gate of which is connected to a wordline and the source and drain of which ar... | 05/05/1992 |
