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Assignee: Silego Technology, Inc.


Location: Santa Clara, CA
No. of patents: 10

NumberTitleIssue Date
8183937Integrated circuit frequency generator
An integrated circuit frequency generator is disclosed. In some embodiments, the frequency generator comprises an electronic oscillator configured to generate an oscillator frequency and calibration circuitry configured to periodically calibrate the electronic oscil...
05/22/2012
8138796Serial configuration interface
A serial configuration interface (SCI) used to configure a device is disclosed. A device that support SCI includes a first connector configured to receive a first signal and a second connector configured to receive a second signal. In a configuration mode, the first...
03/20/2012
8138785Reduced power output buffer
A clock driving circuit and a method of driving a plurality of output lines for a PC architecture are disclosed. The clock driving circuit includes a clock generating circuit coupled to an output buffer for the PC having a plurality of output lines connected to a pl...
03/20/2012
8008953Gate control circuit
An integrated circuit for switching a transistor is disclosed. In some embodiments, an operational amplifier is configured to drive a transistor, and slew rate control circuitry is configured to control the slew rate of the transistor source voltage during turn on. ...
08/30/2011
7797083Communicating a power control feedback signal
Communicating a power control feedback signal from a system is disclosed. In some embodiments, upon determining how to control input power which may be based at least in part, for example, on an in situ measurement of an operating condition in an operating environme...
09/14/2010
7779281Controlling input power
Controlling input power is disclosed. In some embodiments, an in situ measurement of an operating condition in an operating environment is compared to a benchmark, and the comparison is used at least in part to determine whether to change input power. ...
08/17/2010
7612580Reduced power output buffer
A clock driving circuit and a method of driving a plurality of output lines for a PC architecture are disclosed. The clock driving circuit includes a clock generating circuit coupled to an output buffer for the PC having a plurality of output lines connected to a pl...
11/03/2009
7506189Adjusting input power in response to a clock frequency change
Adjusting input power in response to a clock frequency change is disclosed. In some embodiments, a clock signal is input into a buffer, and if an increase in clock frequency is detected at the buffer input relative to the buffer output, the supplied power is increas...
03/17/2009
7358772Reduced power output buffer
A clock driving circuit and a method of driving a plurality of output lines for a PC architecture are disclosed. The clock driving circuit includes a clock generating circuit coupled to an output buffer for the PC having a plurality of output lines connected to a pl...
04/15/2008
6882187Line driving circuit
A line driver and a method for driving a line are disclosed. The line driver includes a first current device configured to initiate a change in the state of the line and a second current device configured to substantially complete the change. The first current devic...
04/19/2005
 
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