Did You Know...
...that power steering was invented by independent inventor Francis W. Davis? As chief engineer in the 1920s of the truck division of the Pierce Arrow Motor Car Company, he saw how hard it was to steer heavy vehicles. So that he would be able to keep the profits from his future invention, Davis left his job, rented a small engineering shop in Waltham, Mass., and developed a hydraulic power steering system that led to power steering.
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| Number | Title | Issue Date |
| 8144045 | Timing signal generator circuit for use in signal waveform measurement system for measuring multi-channel on-chip signals flowing on VLSI A timing signal generator circuit includes a DA converter converting an input digital value into an analog voltage, and a VT converter converting the analog voltage into a corresponding delay time. The DA converter includes a current source circuit, which supplies a... | 03/27/2012 |
| 8046402 | Signal processing method and signal processing apparatus A signal processing method and apparatus reducing distortion using divided signals differing in only amplitude by weighting an input signal by first weights ki (i=1 to 4) to obtain divided signals, performing the same signal processing f(x) on the divided... | 10/25/2011 |
| 8040173 | Reference signal generator circuit with filter-less quadrature mixers for wide-band applications A first mixer circuit mixes a first center frequency signal with a first local oscillation signal to generate a second mixed signal, and mixes the first center frequency signal with a second local oscillation signal to generate a first mixed signal, and a second mix... | 10/18/2011 |
| 8020130 | Timing analysis apparatus and method for semiconductor integrated circuit in consideration of power supply and ground noises In a timing analysis apparatus for use in a semiconductor integrated circuit, which analyzes operation timing of a semiconductor integrated circuit having a logic gate circuit including a plurality of logic gates, a controller detects at least one of a power supply ... | 09/13/2011 |
| 7990233 | MEMS resonator including main and sub movable beams, and exciting electrodes excited by alternating-current signal A MEMS resonator includes a main movable beam, at least one sub movable beam, and at least one exciting electrode. The main movable beam is electrically insulated from a substrate and fixed to at least one fixed end, the sub movable beam is formed to extend from the... | 08/02/2011 |
| 7983858 | Fault test apparatus and method for testing semiconductor device under test using fault excitation function A fault test apparatus for testing a fault on each signal line in a circuit under test including signal lines includes a controller, which calculates a value of a fault excitation function for a fault signal line, using the fault excitation function representing a f... | 07/19/2011 |
| 7907076 | Differential amplifier circuit amplifying differential signals with selectively switching between differential signals and AD converter apparatus A differential amplifier circuit is provided with an operational amplifier and a modulator. The operational amplifier includes a feedback capacitance, and amplifies an analog input signal and outputs an amplified analog output signal. The modulator is connected to a... | 03/15/2011 |
| 7898449 | Differential operational amplifier circuit correcting settling error for use in pipelined A/D converter A telescopic differential operational amplifier circuit for use in a pipelined A/D converter is provided with two auxiliary differential amplifiers connected to two cascode circuits, each including cascode-connected first to fourth transistors. During the sampling p... | 03/01/2011 |
| 7834786 | Sample hold circuit for use in time-interleaved A/D converter apparatus including paralleled low-speed pipeline A/D converters A sample hold circuit is provided for use in a time-interleaved A/D converter apparatus including a plurality of low-speed pipeline A/D converters which are parallelized. The sample hold circuit includes a sampling capacitor and a sample hold amplifier, and operates... | 11/16/2010 |
| 7792229 | Pulsed based communication system A communication system for pulse based communication using a sequence acquisition system using the correlation method in UWB communications which generates a pulse detection signal differing in phase by exactly a predetermined period (τ) from the transmission infor... | 09/07/2010 |
| 7781753 | Multi-value recording phase-change memory device, multi-value recording phase-change channel transistor, and memory cell array A multi-value recording phase-change memory device that can stably record multi-value information, and that can reproduce information with high reliability, comprises a first electrode layer 26, a second electrode layer 28, and a memory layer 30... | 08/24/2010 |
| 7724099 | High frequency oscillator circuit with feedback circuit of fet and short-stub transmission line In a high frequency oscillator circuit including first and second field effect transistors, the first field effect transistor has a gate connected to a short-stub transmission line and a drain connected to an oscillation output terminal, and the second field effect ... | 05/25/2010 |
| 7622993 | Current mirror circuit A current mirror circuit including: a first resistance element having one terminal connected to a first potential, and the other terminal connected to a second potential lower than the first potential; an operational amplifier having a high-potential input terminal ... | 11/24/2009 |
| 7612700 | Pipeline type A/D converter apparatus provided with precharge circuit for precharging sampling capacitor In a pipeline type A/D converter apparatus including A/D converter circuit parts connected in cascade with each other and A/D converting a sample hold signal in a pipeline form, each A/D converter circuit part includes a pre-A/D converter circuit for A/D converting ... | 11/03/2009 |
| 7589587 | Feedback amplifier circuit operable at low voltage by utilizing switched operational amplifier and chopper modulator In a feedback amplifier circuit, a first switching device executes an auto-zero operation by inputting a signal outputted from an amplifier to an input terminal of the amplifier during an auto-zero operation interval prior to an amplification interval. A first capac... | 09/15/2009 |
| 7561094 | Sequential comparison-type AD converter having small size and realizing high speed operation An analog-to-digital converter has a digital-to-analog converter, first, second and third comparators, and a sequential comparison register and control logic circuit. The digital-to-analog converter produces analog signals, the first, second and third comparators co... | 07/14/2009 |
| 7336123 | Chopper amplifier circuit apparatus operable at low voltage utilizing switched operational amplifier In a chopper amplifier circuit operable at a low voltage utilizing a switched operational amplifier, a chopper modulator chopper-modulates an input signal according to a predetermined control signal, and outputs a chopper-modulated signal. An amplifier circuit const... | 02/26/2008 |
| 7332916 | On-chip signal waveform measurement apparatus for measuring signal waveforms at detection points on IC chip An on-chip signal waveform measurement apparatus mounted on an IC chip measures signal waveforms at detection points on the IC chip. A reference voltage generator successively generates reference voltages different from each other based on a predetermined timing sig... | 02/19/2008 |
| 7321594 | Router apparatus provided with output port circuit including storage unit, and method of controlling output port circuit of router apparatus An output port circuit is provided for a router apparatus which routes and transmits a received packet. Each flow is constituted by continuous packets and belongs to a bandwidth-guaranteed class or a best-effort class. A controller controls storage and reading of a ... | 01/22/2008 |
| 7301399 | Class AB CMOS output circuit equipped with CMOS circuit operating by predetermined operating current In a class AB CMOS output circuit provided with a CMOS circuit including first P and N channel transistors and operating by a predetermined operating current Io, a replica circuit is formed on a semiconductor substrate of the CMOS circuit, and includes a ... | 11/27/2007 |
| 7266035 | Self-aligned row-by-row dynamic VDD SRAM A memory cell array includes a plurality of memory cells arranged in a matrix form. A word line and a power supply line respectively are connected in common to the plurality of memory cells arranged in each row. A power supply line/word line control circuit is conne... | 09/04/2007 |
| 7253485 | Semiconductor device and manufacturing method thereof A manufacturing method for a CMOS semiconductor device in which gate electrodes are adjusted to have different work function values comprises forming an device region of a first and second conductivity type for forming first and second MOS semiconductor element devi... | 08/07/2007 |
| 7236634 | Image encoding of moving pictures In an encoding method of moving pictures which generates a predictive picture for a current picture based on a reference picture and a motion vector, a macroblock is divided into subblocks. In each of the plurality of subblocks, an initial value of the motion vector... | 06/26/2007 |
| 7203816 | Multi-processor system apparatus allowing a compiler to conduct a static scheduling process over a large scale system of processors and memory modules A multi-processor system apparatus allows a compiler to perform a static scheduling action easily and can conduct the transfer of data packets without collision in response to a common pattern of simultaneous access demands. Processor elements are interconnected by ... | 04/10/2007 |
| 7127589 | Data processor A data processor capable of executing sequential processing efficiently while retaining the advantages of a prior art data-driven processor. The data processor includes: an instruction fetch unit which fetches a data-driven instruction or a control-driven instructio... | 10/24/2006 |
| 7117291 | Memory with synchronous bank architecture In a synchronous multi-port bank memory, registers/buffers receive a read/write signal and an address signal from each of external ports, receive and send a data signal to and from each of the external ports, and receive and send a port block signal. An access confl... | 10/03/2006 |
| 7098828 | Complex band-pass ΔΣ AD modulator for use in AD converter circuit A complex band-pass ΔΣ AD modulator is provided with a subtracter device, a complex band-pass filter, first and second AD converters, and first and second DA converters. The first and second DA converters and first and second logic circuits are sandwiched by first... | 08/29/2006 |
| 7095350 | DA converter circuit provided with DA converter of segment switched capacitor type A DA converter circuit is provided for use in a ΔΣ AD modulator. The DA converter circuit includes a DA converter of segment switched capacitor type. The DA converter includes an operational amplifier, capacitors as connected in parallel to each other to supply el... | 08/22/2006 |
| 7096129 | Method for calculating threshold voltage of pocket implant MOSFET A threshold voltage model with an impurity concentration profile in a channel direction taken into account is provided in the pocket implant MOSFET. With penetration length of the implanted pocket in the channel direction and the maximum impurity concentration of th... | 08/22/2006 |
| 7039536 | Method and apparatus for analyzing a source current waveform in a semiconductor integrated circuit The invention provides a method of analyzing a source current at a higher speed and an enhanced accuracy in a semiconductor integrated circuit including a digital circuit. The method to analyze a waveform of the source current, with consideration of re-distribution ... | 05/02/2006 |
| 7022598 | Method of producing multilayer interconnection structure A method of producing a buried-type multilayer interconnection structure is provided. The method comprises steps of: forming a hole portion in an insulating layer; forming a catalyst layer having average film thickness from 0.2 nm to 10 nm on a surface of the hole p... | 04/04/2006 |
| 6950902 | Cache memory system A cache memory system having a small-capacity and high-speed access cache memory provided between a processor and a main memory, including a software cache controller for performing software control for controlling data transfer to the cache memory in accordance wit... | 09/27/2005 |
| 6909976 | Method for calculating threshold voltage of pocket implant MOSFET A threshold voltage model with an impurity concentration profile in a channel direction taken into account is provided in the pocket implant MOSFET. With penetration length of the implanted pocket in the channel direction and the maximum impurity concentration of th... | 06/21/2005 |
| 6864539 | Semiconductor integrated circuit device having body biasing circuit for generating forward well bias voltage of suitable level by using simple circuitry A semiconductor integrated circuit device has a MISFET and a body biasing circuit. The MISFET has a source electrode and a drain electrode of a first conductivity type and a gate electrode, and the MISFET is formed in a well of a second conductivity type. The body b... | 03/08/2005 |
| 6857052 | Multi-processor system including a mode switching controller Any of the processors CPU1 to CPUn turns the miss hit detecting signal line 5 to a low level upon detecting occurrence of a miss hit. In response, the mode switching controller 2 is notified of the occurrence of a miss hit and switches each of t... | 02/15/2005 |
| 6852624 | Electroless plating process, and embedded wire and forming process thereof The present invention is to provide a process for forming the embedded wires having the higher density and the finer pitch without using catalyzing agent in an economical manner. The electroless plating process of copper according to the present invention includes s... | 02/08/2005 |
| 6833725 | Semiconductor characteristic evaluation apparatus On a basic measurement unit arranged in a lattice shape on a chip, a resistance measurement circuit, a capacity measurement circuit, an n-type MOS transistor measurement circuit, a p-type MOS transistor measurement circuit, and a ring oscillator measurement circuit ... | 12/21/2004 |
| 6812737 | Programmable logic circuit device having look up table enabling to reduce implementation area A programmable logic circuit device has a plurality of logic blocks, a plurality of routing wires, a plurality of switch circuits, a plurality of connection blocks, and an I/O block performing an input/output operation with external equipment. The routing wires are ... | 11/02/2004 |
| 6756928 | Pseudo-differential amplifier and analog-to-digital converter using the same A pseudo-differential amplifier circuit 1 is constructed from two equivalent amplifiers 2 and 3 that amplify a pair of input signals without using a differential pair. This pseudo-differential amplifier circuit 1 is used in an arithmetic ... | 06/29/2004 |
| 6700417 | Sampling and hold circuit A sampling and hold circuit that can suppress voltage variation at the input terminals, which are virtual grounds, of a differential amplifier, depending on the frequency of input signals. During sampling operation, a serial circuit composed of a capacito... | 03/02/2004 |
