Bizarre Patents
User-operated amusement apparatus for kicking the user's buttocks
An apparatus including a user-operated and controlled apparatus for self-infliction of repetitive blows to the user's buttocks by a plurality of elongated arms bearing flexible extensions that rotate under the user's control.
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| Number | Title | Issue Date |
| 8178939 | Interfacial barrier for work function modification of high performance CMOS devices A semiconductor structure may include a semiconductor bulk region with a gate stack on the semiconductor bulk region. The source region and the drain region in the semiconductor bulk region may be located on opposing sides of a channel region below the gate stack. A... | 05/15/2012 |
| 8134684 | Immersion lithography using hafnium-based nanoparticles Method, apparatus, and composition of matter suited for use with, for example, immersion lithography. The composition of matter includes hafnium dioxide nanoparticles having diameters less than or equal to about 15 nanometers. The apparatus includes the composition ... | 03/13/2012 |
| 7921859 | Method and apparatus for an in-situ ultraviolet cleaning tool The present invention provides an apparatus and a method for an ultraviolet cleaning tool. The cleaning tool includes ultraviolet source spaced apart from a surface having contaminant particles. The ultraviolet source can create ozone between the surface and the ult... | 04/12/2011 |
| 7855139 | Systems and methods for controlling the effective dielectric constant of materials used in a semiconductor device Systems and methods for controlling the effective dielectric constant of materials used in a semiconductor device are shown and described. In one embodiment, a method comprises providing a semiconductor substrate with a plurality of pillars formed thereon, depositin... | 12/21/2010 |
| 7772710 | Zero-order overlay targets A zero-order overlay target comprises a first zero-order line array fabricated on a first layer of a semiconductor structure, the first zero-order line array having a first pitch, and a second zero-order line array fabricated on a second layer of the semiconductor s... | 08/10/2010 |
| 7760341 | Systems and methods for in-situ reflectivity degradation monitoring of optical collectors used in extreme ultraviolet (EUV) lithography processes Systems and methods for in-situ reflectivity degradation monitoring of optical collectors used in extreme ultraviolet (EUV) lithography processes are described. In one embodiment, a method comprises providing a semiconductor lithography tool employing an EUV source ... | 07/20/2010 |
| 7741168 | Systems and methods for fabricating nanometric-scale semiconductor devices with dual-stress layers using double-stress oxide/nitride stacks Systems and methods for fabricating semiconductor devices with dual-stress layers using double-stress oxide/nitride stacks. A method comprises providing NMOS and PMOS regions, selectively forming a dual-stack tensile stress layer over the NMOS region by depositing a... | 06/22/2010 |
| 7736954 | Methods for nanoscale feature imprint molding Methods for fabricating nanoscale features are disclosed. One technique involves depositing onto a substrate, where the first layer may be a silicon layer and may subsequently be etched. A second layer and third layer may be deposited on the etch first layer, follow... | 06/15/2010 |
| 7709816 | Systems and methods for monitoring and controlling the operation of extreme ultraviolet (EUV) light sources used in semiconductor fabrication Systems and methods for monitoring and controlling the operation of extreme ultraviolet (EUV) sources used in semiconductor fabrication are disclosed. A method comprises providing a semiconductor fabrication apparatus having a light source that emits in-band and out... | 05/04/2010 |
| 7709180 | Soft pellicle and method of making same The present invention relates generally to the fields of semiconductor lithography. More particularly, it concerns methods, compositions, and apparatuses relating to 157 nm, 167 nm, 193 nm, 248 nm, 365 nm, and 436 nm soft pellicles and the use of perfluorinated poly... | 05/04/2010 |
| 7629556 | Laser nozzle methods and apparatus for surface cleaning Apparatuses and methods for cleaning a surface comprising contaminate particles are provided. In one respect, plasma and/or a shockwave may be created in a fluid flowing through a nozzle. The nozzle, coupled to a laser source and a fluid feed may be configured to de... | 12/08/2009 |
| 7626712 | Methods and systems for characterizing semiconductor materials Methods for determining parameters of a semiconductor material, for example, non-classical substrates such as silicon-on-insulator (SOI) substrates, strained silicon-on-insulator (sSOI) substrates, silicon-germanium-on-insulator (GeOI) substrates, and strained silic... | 12/01/2009 |
| 7595204 | Methods and systems for determining trapped charge density in films Methods and systems for determining a charge trap density between a semiconductor material and a dielectric material are disclosed. In one respect, spectroscopic data of the semiconductor material may be determined and used to determine a change in dielectric functi... | 09/29/2009 |
| 7580138 | Methods and systems for characterizing semiconductor materials Methods for determining parameters of a semiconductor material, in particular non-classical substrates such as silicon-on-insulator (SOI) substrates, strained silicon-on-insulator (sSOI) substrates, silicon-germanium-on-insulator (GOI) substrates, and strained silic... | 08/25/2009 |
| 7548067 | Methods for measuring capacitance Methods for determining capacitance values of a metal on semiconductor (MOS) structure are provided. A time domain reflectometry circuit may be loaded with a MOS structure. The MOS structure may be biased with various voltages, and reflectometry waveforms from the a... | 06/16/2009 |
