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| Number | Title | Issue Date |
| RE43218 | Circuit and method for processing communication packets and valid data bytes Method and apparatus for processing data packets within a communication system such as a synchronous optical network (SONET) detect an invalid byte and drop and shift bytes of data to address an invalid byte. A method according to one embodiment of the present inven... | 02/28/2012 |
| 7370263 | Hardware efficient CRC generator for high speed communication networks A cyclic redundancy check (CRC) generator, in accordance with a specific embodiment of the present invention, generates a 32-bit CRC for each packet whose data bytes are carried over a 128-bit bus by first dividing the data bytes by a 123nd degree generat... | 05/06/2008 |
| 7318188 | Hardware-efficient CRC generator for high speed communication networks A cyclic redundancy check (CRC) generator, in accordance with a specific embodiment of the present invention, generates a 32-bit CRC for each packet whose data bytes are carried over a 128-bit bus by first dividing the data bytes by a 123nd degree generat... | 01/08/2008 |
| 7292607 | Method and circuit for processing data in communication networks A method and circuitry for detecting a pattern in received data such as the A1A2 boundary in a SONET frame after deserialization. Two consecutive pluralities of bytes of incoming data are stored and compared with the A1 and A2 values (or bit shifted versions of the ... | 11/06/2007 |
