Assignee: SanDisk Corporation

Location: Milpitas, CA
No. of patents: 952

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Number	Title	Issue Date
8163593	Method of making a nonvolatile phase change memory cell having a reduced contact area A method is described to form a nonvolatile memory cell having a contact area between a phase-change material such as a chalcogenide and a heat source which is smaller than photolithographic limits. A conductive or semiconductor pillar is exposed at a dielectric sur...	04/24/2012
8099652	Non-volatile memory and methods with reading soft bits in non uniform schemes A non-volatile memory has its cells' thresholds programmed within any one of a first set of voltage bands partitioned by a first set of reference thresholds across a threshold window. The cells are read at a higher resolution relative to a second set of reference th...	01/17/2012
8040727	Flash EEprom system with overhead data stored in user data sectors A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Sele...	10/18/2011
8015340	Enhanced data communication by a non-volatile memory card A method of transmitting a stream of data bits from a memory card to a host device includes determining, at the memory card, a first number of data lines between the memory card and the host device, from one to a plurality of data lines. If the first number of data ...	09/06/2011
7998640	Mask reuse in semiconductor processing A mask is reused to form the same pattern in multiple layers in semiconductor processing. Reference marks that allow alignment accuracy to be checked are also formed with the mask. The manner of using the mask advantageously mitigates interference between reference ...	08/16/2011
7984233	Direct data file storage implementation techniques in flash memories Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. ...	07/19/2011
7979700	Apparatus, system and method for securing digital documents in a digital appliance Various embodiments include an apparatus and a method to secure protected digital document content from tampering by their user, such as unauthenticated use or use violating a policy of the digital document. The digital document file can be transferred from a networ...	07/12/2011
7978533	NAND flash memory with a programming voltage held dynamically in a NAND chain channel region Operating voltages to a group of memory cells in an array are supplied via access lines such as word lines and bit lines. The capacitance of associated nodes of the memory cells can latch some of these voltages. Memory operation can continue using the latched voltag...	07/12/2011
7978526	Low noise sense amplifier array and method for nonvolatile memory In sensing a page of nonvolatile memory cells with a corresponding group of sense modules in parallel, as each high current cell is identified, it is locked out from further sensing while others in the page continued to be sensed. The sense module involved in the lo...	07/12/2011
7978520	Compensation of non-volatile memory chip non-idealities by program pulse adjustment To program a set of non-volatile storage elements, a set of programming pulses are applied to the control gates (or other terminals) of the non-volatile storage elements. The programming pulses have pulse widths that vary as a function of simulated pulse magnitude d...	07/12/2011
7977186	Providing local boosting control implant for non-volatile memory A substrate of a non-volatile storage system includes selected regions in which additional ions are deeply implanted during the fabrication process. NAND strings are formed over the selected regions such that end word lines of the NAND strings are over the deeply im...	07/12/2011
7974124	Pointer based column selection techniques in non-volatile memories Selecting circuits for columns of an array of memory cells are used to hold read data or write data of the memory cells. In a first set of embodiments, a shift register chain, having a stage for columns of the array, has the columns arranged in a loop. For example, ...	07/05/2011
7973592	Charge pump with current based regulation A charge pump system using a current based regulation method, in addition to the typical voltage based regulation methods is presented. The current flow in the charge pump is determined independently of the output voltage. By sensing the current going through the ch...	07/05/2011
7971023	Guaranteed memory card performance to end-of-life In order to maintain a memory system's performance levels to its end-of-life, latency threshold level(s) are specified and associated with different memory system operating parameters. In one embodiment, the memory system monitors and gathers performance statistics ...	06/28/2011
7970987	Partial block data programming and reading operations in a non-volatile memory Data in less than all of the pages of a non-volatile memory block are updated by programming the new data in unused pages of either the same or another block. In order to prevent having to copy unchanged pages of data into the new block, or to program flags into sup...	06/28/2011
7970985	Adaptive deterministic grouping of blocks into multi-block units The present invention presents techniques for the linking of physical blocks of a non-volatile memory into composite logical structures or “metablocks”. After determining an initial linking of good physical blocks into metablocks, a record of the linking is main...	06/28/2011
7969778	System that compensates for coupling based on sensing a neighbor using coupling Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing ele...	06/28/2011
7969235	Self-adaptive multi-stage charge pump A charge pump circuit for generating an output voltage is described. The charge pump includes multiple output generation stages connected in series and a corresponding set of multiple gate stages connected in series, where the output stages have the same structure a...	06/28/2011
7967184	Padless substrate for surface mounted components A semiconductor package having a low profile is disclosed. In embodiments, a surface mounted component may be mounted directly to the core of the semiconductor package substrate, so that there is no conductive layer, plating layers or solder paste between the compon...	06/28/2011
7966518	Method for repairing a neighborhood of rows in a memory array using a patch table A method for repairing a neighborhood of rows in a memory array using a patch table is disclosed. First data to be stored in row N in a memory array of the memory device, second data, if any, stored in row N−1 in the memory array, and third data, if any, stored in...	06/21/2011
7965562	Predictive programming in non-volatile memory In a nonvolatile memory having an array of memory cells, wherein the memory cells are individually programmable to one of a range of threshold voltage levels, there is provided a predictive programming mode in which a predetermined function predicts what programming...	06/21/2011
7965560	Non-volatile memory with power-saving multi-pass sensing A non-volatile memory device capable of reading and writing a large number of memory cells with multiple read/write circuits in parallel has features to reduce power consumption during sensing, which is included in read, and program/verify operations. A sensing veri...	06/21/2011
7965554	Selective erase operation for non-volatile storage A non-volatile storage system can selectively perform one or more erase operations on a subset of non-volatile storage elements that are connected to a common word line (or other type of control line) without intentionally erasing other non-volatile storage elements...	06/21/2011
7962819	Test mode soft reset circuitry and methods An integrated circuit chip includes a scan-in pin, a scan clock pin, and a test controller. The scan-in pin and the scan clock pin receive a test program for the type of test mode and a soft-reset pattern. A state machine is configured to direct sampling of a scan c...	06/14/2011
7962777	Flash memory system startup operation Multiple copies of firmware code for controlling operation of a non-volatile flash memory system are stored at different suitable locations of the flash memory of a memory system. A map of addresses of these locations is also stored in the flash memory. Upon initial...	06/14/2011
7962684	Overlay management in a flash memory storage device The operating firmware of a portable flash memory storage device is stored in the relatively large file storage memory, which is non executable. It is logically parsed into overlays to fit into an executable memory. The overlays can be of differing sizes to organize...	06/14/2011
7962682	Multi-module simultaneous program, erase test, and performance method for flash memory Methods and apparatus for accessing modules on a flash memory package concurrently during testing are disclosed. According to one aspect of the present invention, a memory device for storing data includes a plurality of modules and a logic block. The plurality of mo...	06/14/2011
7961512	Adaptive algorithm in cache operation with dynamic data latch requirements A non-volatile memory can perform a first operation (such as a write, for example) on a designated group of one or more addressed pages using a first set of data stored in the corresponding set of data latches and also receive a request for a second operation (such ...	06/14/2011
7961511	Hybrid programming methods and systems for non-volatile memory storage elements A hybrid method of programming a non-volatile memory cell to a final programmed state is described. The method described is a more robust protocol suitable for reliably programming selected memory cells while eliminating programming disturbs. The hybrid method compr...	06/14/2011
7960266	Spacer patterns using assist layer for high density semiconductor devices High density semiconductor devices and methods of fabricating the same are provided. Spacer fabrication techniques are utilized to form circuit elements having reduced feature sizes, which in some instances are smaller than the smallest lithographically resolvable e...	06/14/2011
7958390	Memory device for repairing a neighborhood of rows in a memory array using a patch table A memory device for repairing a neighborhood of rows in a memory array using a patch table is disclosed. In one embodiment, circuitry in the memory device is operative to store, in a temporary storage area of the memory device, (i) first data to be stored in row N i...	06/07/2011
7957197	Nonvolatile memory with a current sense amplifier having a precharge circuit and a transfer gate coupled to a sense node Sensing circuits for sensing a conduction current of a memory cell among a group of non-volatile memory cells being sensed in parallel and providing the result of the sensing to a data bus are presented. A precharge circuit is coupled to a node for charging the node...	06/07/2011
7957187	Dynamic and adaptive optimization of read compare levels based on memory cell threshold voltage distribution A process is performed periodically or in response to an error in order to dynamically and adaptively optimize read compare levels based on memory cell threshold voltage distribution. One embodiment of the process includes determining threshold voltage distribution ...	06/07/2011
7957185	Non-volatile memory and method with power-saving read and program-verify operations A non-volatile memory device capable of reading and writing a large number of memory cells with multiple read/write circuits in parallel has features to reduce power consumption during read, and program/verify operations. A read or program verify operation includes ...	06/07/2011
7953930	Device identifiers for nonvolatile memory modules A memory card has a data scrambler that performs a data scrambling operation on data stored in the memory card according to a device ID associated with the memory card. The device ID is either set at the factory and permanently stored in the card, or configurable by...	05/31/2011
7952179	Semiconductor package having through holes for molding back side of package A portable memory card and methods of manufacturing same are disclosed. The portable memory includes a substrate having a plurality of holes formed therein. During the encapsulation process, mold compound flows over the top surface of the substrate, through the hole...	05/31/2011
7951669	Methods of making flash memory cell arrays having dual control gates per memory cell charge storage element Methods of fabricating a dual control gate non-volatile memory array are described. Parallel strips of floating gate material are formed over the substrate in a first direction but separated from it by a tunnel dielectric. In the gaps between these strips control ga...	05/31/2011
7949845	Indexing of file data in reprogrammable non-volatile memories that directly store data files Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. ...	05/24/2011
7948264	Systems, methods, and integrated circuits with inrush-limited power islands A new approach for managing turn-on of power islands uses a precharge phase to begin the process of bringing up the island's internal supply voltage, while minimizing transients and associated power-control-logic instability. ...	05/24/2011
D638431	MicroSD memory card with a semi-transparent color surface	05/24/2011

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Assignee: SanDisk Corporation