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Microwave Oven With Removable Storage Cassette in Dashboard of Motor Vehicle
A microwave oven adapted for use within a motor vehicle dashboard area. The microwave oven has a removable storage cassette, and slidable platforms for securing and serving containers of beverages and foods.
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| Number | Title | Issue Date |
| 8185058 | Radio coexistence mechanism for variable data rate radio links A device has a radio transmitter for a first radio link such as a Bluetooth link, having a coexistence controller arranged to communicate with a co-located other radio transmitter for another radio link, to enable both radio links to use potentially conflicting tran... | 05/22/2012 |
| 8184046 | Time reference system A time reference system for generating a time reference from signals produced by a global navigation satellite constellation has a satellite signal receiver to receive and down-convert code-modulated signals from a plurality of satellites and a correlator to track a... | 05/22/2012 |
| 8178901 | Integrated circuit assembly with passive integration substrate for power and ground line routing on top of an integrated circuit chip An integrated circuit assembly (ICA) comprises: a digital and/or analog integrated circuit (S1) having a core with input and/or output pins and at least one power supply connection pad (PP) and one ground connection pad (GP) connected to a chosen one of the i... | 05/15/2012 |
| 8170511 | Equalizer system for emitting a quasi-constant power output RF signal in a frequency band The invention refers to an equalizer system for emitting a quasi-constant power output RF signal in a first frequency band, the system comprising a programmable RF signal generator (10) for providing a modulated signal; a variable gain amplifier (40) f... | 05/01/2012 |
| 8160533 | Self-calibrating mixer Mixer circuits (1) comprise mixers (2) for receiving input signals and oscillation signals and for outputting output signals. By providing the mixers (2) with loads (3) having adjustable load values and by introducing adjustors (4)... | 04/17/2012 |
| 8160091 | System and method for synchronising a data processing network A data processing system according to the invention comprising a group of at least a first and a second module, wherein each module has a data processing facility, a clock for timing data transmissions from the module to another module, a time-slot counter for count... | 04/17/2012 |
| 8159380 | Continuous-time sigma-delta analog-to-digital converter with non-invasive filter(s) for immunity preservation against interferers A continuous-time sigma-delta analog-to-digital converter (CV) comprises i) a signal path (SP) which includes at least one combiner (C1) for combining analog signals to be converted with analog feedback signals, at least one integrator (H1) for integra... | 04/17/2012 |
| 8159203 | DC-DC converter with switchable estimators A DC-DC converter is provided with a first estimator unit (RAE, RLPF, RHPF) for performing an accurate control signal estimation and a second estimator unit (FEU, ΔVEU) for performing a fast control signal estimation. In addition, a switching unit (SU) is provided ... | 04/17/2012 |
| 8154357 | Modulation for amplitude-modulating a signal Modulators for amplitude-modulating signals defined by phase information and envelope codes are provided with first transistors for receiving the phase information and second transistors for receiving the envelope codes. The first main electrode of one transistor is... | 04/10/2012 |
| 8145176 | Front end and high frequency receiver having quadrature low noise amplifier A front end and a high frequency receiver (1) provided therewith are described, which front end comprises a quadrature low noise amplifier (2-1, 2-2) as a low noise amplifier. A high isolation between local oscillators (6-1, 6 | 03/27/2012 |
| 8140044 | Mixer circuit and method of operation A mixer circuit to mix a RF (Radio Frequency) signal with a LO (Local Oscillator) signal to generate an IF (Intermediate Frequency) signal including a dummy branch connected in parallel of a mixing branch, the dummy branch including a transconductance stage having a... | 03/20/2012 |
| 8135897 | Memory architecture A memory architecture is presented. The memory architecture comprises a first memory and a second memory. The first memory has at least a bank with a first width addressable by a single address. The second memory has a plurality of banks of a second width, said bank... | 03/13/2012 |
| 8129961 | DC/DC-converter The present invention relates voltage conversion device in which a regulated output voltage is supplied by current pulses generated by the voltage conversion device from a voltage source. In particular, the invention relates to an improved control of an pulse freque... | 03/06/2012 |
| 8125209 | Reference voltage circuit The present invention provides a reference voltage circuit making use of a non-volatile and non-modifiable storage of an electric charge. A tunable transformation module is adapted to transform a constant voltage corresponding to the constant stored charge into an o... | 02/28/2012 |
| 8125074 | Laminated substrate for an integrated circuit BGA package and printed circuit boards A laminated substrate for an integrated circuit package, including a core layer and at least one build-up layer located above only one side of said core layer. An integrated circuit package, including a laminated substrate and including an integrated circuit die pla... | 02/28/2012 |
| 8120410 | Adaptive control of power supply for integrated circuits The present invention relates to a circuit arrangement and method for controlling power supply in an integrated circuit wherein at least one working parameter of at least one electrically isolated circuit region (10) is monitored, and the conductivity of a va... | 02/21/2012 |
| 8120385 | Reduction in kickback effect in comparators The present disclosure relates to reduction in the effect of kickback in comparators by means of charge injection implemented by means of voltage controlled switches with attributes similar to those of an input differential pair. The voltage controlled switches prod... | 02/21/2012 |
| 8116355 | Method of selecting echoes of a signal for assignment to fingers of a Rake receiver and corresponding Rake receiver A method is provided for processing a signal emanating from a multi-path transmission medium. A number L of echoes of the signal received are detected, with L being greater than the number N of fingers of a “Rake” receiver, and there are selected N echoes from a... | 02/14/2012 |
| 8107553 | Crest factor reduction in multicarrier transmission schemes A multicarrier transmission system uses a set of carriers spaced apart in frequency with a number of bits being assigned to each carrier. A transmitter has a mapper which maps a data signal to a parallel set of constellation values. A frequency domain-to-time domain... | 01/31/2012 |
| 8102956 | Smart antenna solution for mobile handset A mobile terminal with smart antennas, comprises a plurality of groups of radio frequency signal processing modules (300), for transforming received multi-channel radio frequency signals to multi-channel baseband signals; a smart antenna processing module ( | 01/24/2012 |
| 8102905 | Pulse detection in wireless communications system Pulses are detected in a communications receiver by programming each of a plurality of comparators (44a, 44b, . . . , 44n) with a sampling time point selected from a plurality of sampling time points (58, 60) and with... | 01/24/2012 |
| 8098721 | Reception of a signal transmitted over a transmission link comprising coded channels A method to receive a signal transmitted over a transmission link comprising coded channels, the method comprising: —equalization operations (110-116) to compensate for signal distortion introduced by the transmission link in a signal burst, and—bl... | 01/17/2012 |
| 8082284 | Implementation of wide multiplexers in reconfigurable logic A reconfigurable processing device comprises one or more reconfigurable processing units. At least one processing unit utilizes a computational unit having a preprocessing module for receiving n input signals, and s1 selection signals, and providing k output signals... | 12/20/2011 |
| 8081939 | Correlation-driven adaptation of frequency control for a RF receiver device A frequency-control unit is used for controlling an external controllable reference-frequency source. The frequency-control unit includes a filter unit with a controllable filter parameter, which is configured to derive, using the filter parameter, from a frequency-... | 12/20/2011 |
| 8076955 | Configurable logic device The configurable logic device comprises a plurality of configurable logic cells (2). A configurable logic cell comprises a plurality of multi-bit registers (20a, 20b, 20c, 20d). At least one is accessibl... | 12/13/2011 |
| 8073045 | Method and a system for generating an adaptive slicer threshold An adaptive slicer threshold is derived from averages of maximum and minimum values of the received signal, the method comprising the steps of: —averaging (86) several detected maximum values and averaging several detected minimum values, and —calculating... | 12/06/2011 |
| 8072195 | Voltage converter A voltage converter connectable to a power source (PS) and a load (LD) provides a regulated output voltage (Vout) from a voltage (Vin) power source by switchable current paths including an inductive element (L). The voltage converter includes a plurality of switchin... | 12/06/2011 |
| 8064177 | ESD protection for DC/DC converter The present invention relates to an electronic device including electronic circuitry, wherein the circuitry includes a first switching transistor (MN1) being adapted to serve as an integrated switch, and a first clamp transistor (MNC1) being coupled to... | 11/22/2011 |
| 8045986 | Cell selection device for wireless communication equipment A cell selection device (D) is dedicated to a piece of wireless communication equipment (MS) arranged to establish radio communications with a radio communication network comprising radio communication cells and to receive data representative of the cell environment... | 10/25/2011 |
| 8044756 | Programmable inductor The present invention provides a programmable integrated inductor having a compact design, having a dual turn and a parallel programmable impedance. In particular, the impedance value of the programmable changes, like a variable, programmable, as its range may be se... | 10/25/2011 |
| 8035354 | Battery full-charge detection for charge-and-play circuits The present invention relates to a battery charge circuit (100) in a charge-and-play mode capable to reliably determine the completion of a battery charging operation has been described. Such a determination takes into account the behavior of the battery char... | 10/11/2011 |
| 8035353 | Battery recharge prevention principle for short battery voltage dips The present invention relates to a method and circuit configuration (100) for preventing any needless battery recharge at each short battery voltage dip. Such a circuit configuration (100) comprises a detector means (200) for detecting a voltage... | 10/11/2011 |
| 8032693 | Serial in random out memory A serial in random out memory circuit has a number of memory cells integrated with write control circuitry for writing a sequence of data inputs to sequential locations in the memory cells. Read control circuitry is integrated to receive address signals from an exte... | 10/04/2011 |
| 8031746 | Synchronized receiver There is provided a method of operating a communications system comprising a transmitting station and a receiving station, the method in the transmitting station comprising encoding a clock signal with data to form encoded signals for transmission; transmitting the ... | 10/04/2011 |
| 8019985 | Data-processing arrangement for updating code in an auxiliary processor memory A data-processing arrangement includes a main processor and an auxiliary processor. A system-program code causes the main processor to write an application-program code into a shared memory. The system-program code further causes the main processor to write an addre... | 09/13/2011 |
| 8013684 | Radio frequency noise and interference suppression in an integrated circuit In an integrated circuit having a number of circuit units on a single semiconductor chip, particularly in a system-on-chip integrated circuit including an integrated transceiver, interference between the circuit units is suppressed using on-chip resonant elements. E... | 09/06/2011 |
| 8005159 | Methods for channel estimation in the presence of transmit beamforming The present invention relates to a method for estimating a propagation channel in the presence of transmit beam-forming within a receiver, accounting for the structure of two logical channels referred as to a common channel and a dedicated physical channel (CPICH, D... | 08/23/2011 |
| 8004430 | Coding scheme for serial data communications An encoding scheme generates an encoded nine bit code word from each input eight bit data word. The coding scheme is such that the encoded data words have advantageous properties, such as a minimum of two polarity transitions in each encoded data word, and a maximum... | 08/23/2011 |
| 7999587 | Enhanced predistortion for slewing correction The present invention relates to a circuit arrangement and method of applying predistortion to a baseband signal used for modulating a pulse-shaped signal, wherein an envelope information of the baseband signal is detected and slewing distortions of the pulse-shaped... | 08/16/2011 |
| 7984365 | Turbo decoder with stake heritage for data block redundant version decoding An iterative decoding device for a communication receiver includes a decoder for decoding received encoded data blocks by a next iteration initialization, a controller to choose one of the first and second hard decision bits in order for the validity of a CRC field,... | 07/19/2011 |
