Quotables
"It is my heart-warmed and world-embracing Christmas hope and aspiration that all of us, the high, the low, the rich, the poor, the admired, the despised, the loved, the hated, the civilized, the savage (every man and brother of us all throughout the whole earth), may eventually be gathered together in a heaven of everlasting rest and peace and bliss, except the inventor of the telephone. "
Mark Twain ; Christmas greetings, 1890
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| Number | Title | Issue Date |
| RE41179 | Device for extracting parameters for decoding a video data flow coded according to an MPEG standard A device for extracting parameters for decoding a video data flow, contained in headers preceded by a starting code of series of data coded according to an MPEG standard, organized, independently and according to the starting code, and storage of the parameters in t... | 03/30/2010 |
| 7623405 | SRAM with switchable power supply sets of voltages A circuit includes a memory cell having a high voltage supply node and a low voltage supply node. Power multiplexing circuitry is included to selectively apply one of a first set of voltages and a second set of voltages to the high and low voltage supply nodes of th... | 11/24/2009 |
| 7372728 | Magnetic random access memory array having bit/word lines for shared write select and read operations A random access memory array includes random access memory elements arranged in a rows and columns. The elements of each row have a word line and a write digit line and the elements of each column have a bit line and a write bit line. A first selection circuit/trans... | 05/13/2008 |
| 7372304 | System and method for glitch detection in a secure microcontroller An apparatus includes a plurality of macrocells formed from logic capable of performing one or more functions. The apparatus also includes a clock tree capable of receiving a clock signal and providing at least one copy of the clock signal to each macrocell. The clo... | 05/13/2008 |
| 7372290 | System and method for using dummy cycles to mask operations in a secure microcontroller A secure device includes a memory capable of storing information. The secure device also includes a secure microcontroller capable of securing the information in the memory. The secure microcontroller includes a plurality of registers. The secure microcontroller als... | 05/13/2008 |
| 7370264 | H-matrix for error correcting circuitry A matrix H for encoding data words is defined for wide word ECC with uniform density and a reduced number of components. The H-matrix is incorporated in an encode unit operable to Hamming encode a data word with a 10×528 matrix generated in groups of four columns w... | 05/06/2008 |
| 7312658 | Differential amplifier with two outputs and a single input of improved linearity A differential amplifier having a first and second output terminals and receiving an input signal at an input terminal. The amplifier comprises a first amplifier having a first input connected to the input terminal, a second input and a first output connected togeth... | 12/25/2007 |
| 7294598 | Dielectric oxide materials A material made of a dielectric oxide of type Ca0.25Cu0.75TiO3 having a dielectric constant greater than 3,000. ... | 11/13/2007 |
| 7292066 | One-time programmable circuit exploiting BJT hdegradation A one-time programmable circuit uses forced BJT hFE degradation to permanently store digital information as a logic zero or logic one state. The forced degradation is accomplished by applying a voltage or current to the BJT for a specific time to the reve... | 11/06/2007 |
| 7290089 | Executing cache instructions in an increased latency mode For instruction clusters for which no significant performance penalty is incurred, such as execution of hardware loops, a processor automatically and dynamically switches to a pipelined two-cycle access to an associated associative cache rather than a single-cycle a... | 10/30/2007 |
| 7256607 | System and method for using dummy cycles to mask operations in a secure microcontroller A secure device includes a memory capable of storing information. The secure device also includes a secure microcontroller capable of securing the information in the memory. The secure microcontroller includes a plurality of registers. The secure microcontroller als... | 08/14/2007 |
| 7233512 | Content addressable memory circuit with improved memory cell stability A Content Addressable Memory (CAM) circuit includes memory cells preferably formed as two memory cells each having internal nodes. A compare circuit is operative with the memory cells. A common terminal (VPL) exists for the memory cells. Capacitors are added between... | 06/19/2007 |
| 7208377 | Silicon oxidation method A method for forming, by thermal oxidation, a silicon oxide layer on an integrated circuit including three-dimensional silicon patterns, includes implanting a first element according to a first angle with respect to a horizontal direction. The first element is elect... | 04/24/2007 |
| 7167036 | Circuit for transforming signals varying between different voltages An interface circuit for transforming a first signal varying between a low voltage and a high voltage into a second signal varying between a lower voltage and a higher voltage, the lower voltage being smaller than the low voltage and/or the higher voltage being grea... | 01/23/2007 |
| 7151402 | Triac control circuit A circuit for controlling a triac, comprising: a bidirectional current-limiting active element connecting the triac gate to its opposite power electrode; and a switch connecting the gate to the other power electrode of the triac. ... | 12/19/2006 |
| 7110741 | Radiofrequency unit A radiofrequency unit comprising a first dielectric substrate supporting a first conductive antenna layer; a second dielectric substrate supporting circuit elements connected or coupled to ground formed in a second conductive layer, and comprising a radiofrequency a... | 09/19/2006 |
| 7084473 | Semiconductor package with an optical sensor which may be fit inside an object A semiconductor package includes a package body containing an integrated-circuit chip having an optical sensor. The package can be fitted into an object having two parts suitable for being coupled. A board in the object is provided with electrical connection tracks.... | 08/01/2006 |
| 7078799 | Semiconductor package A semiconductor package includes a body having a cavity closed by a lid. In the cavity, an integrated-circuit chip is placed. Electrical connection leads are carried by the body. These leads have resilient inner terminal parts which lie in the cavity and are suitabl... | 07/18/2006 |
| 7076224 | Process for controlling the gain of a frequency tuner, and corresponding tuner, in particular for the reception of terrestrial digital television signals A method and device are disclosed for receiving digital television signals by a frequency tuner. The power of the signal is measured after an analog/digital conversion in the frequency tuner, and the gain thereof is controlled on the basis of this power measurement ... | 07/11/2006 |
| 7064053 | Process for fabricating an electrical circuit comprising a polishing step A process for fabricating an integrated electrical circuit comprises the formation and then the removal of conducting inserts. Components of the electrical circuit are incorporated into insulating materials superposed on top of a substrate. The process makes it poss... | 06/20/2006 |
| 7041585 | Process for producing an integrated electronic component A process for producing an electronic component includes covering a substrate with a portion defining, with the substrate, a volume at least partly filled with a temporary material. The temporary material is then removed via chimney for access to said volume. A depo... | 05/09/2006 |
| 7029927 | Method of repairing an integrated electronic circuit using a formed electrical isolation A method of repairing a defect in an integrated electronic circuit caused by an incorrect lithographic mask includes the formation of an electrical isolation between two conducting parts of the circuit. The electrical isolation is obtained by at least partly filling... | 04/18/2006 |
| 7027350 | Device and method for partial read-protection of a non-volatile storage A device for read protection of at least one area of a non-volatile memory includes an address decoder outputting an addressing signal on one of its output terminals when an the address corresponds to one of the read protected areas of the memory. A state memory is ... | 04/11/2006 |
| 7018865 | Method of protecting an element of an integrated circuit against the formation of a metal silicide A semiconductor material is protected against the formation of a metal silicide by forming a layer of a silicon/germanium alloy on the material. The material which is protected belongs to a component of an integrated circuit comprising other components that have to ... | 03/28/2006 |
| 7018112 | Method of assembling an optical system with an optical package in advance An optical system with an optical package capable of being assembled in advance. The optical package comprises a body that contains an integrated-circuit chip having an optical sensor on its front face, a ring and an optical device intended to be placed in front of ... | 03/28/2006 |
| 7012331 | Device for mounting a semiconductor package on a support plate via a base A semiconductor package is mounted to a support plate through a base. The base is inserted between a rear face of the semiconductor package and a front face of the support plate. An electrical connection mechanism is provided to connect the semiconductor package to ... | 03/14/2006 |
| 6989570 | Strained-channel isolated-gate field effect transistor, process for making same and resulting integrated circuit A transistor is located on a base layer 1 resting on a semiconductor substrate SB and formed from a relaxed silicon-germanium layer, and includes, under the isolated gate 7, a first strained silicon layer 2 resting on the base layer 1, su... | 01/24/2006 |
| 6972240 | Forming of close thin trenches A method for forming narrow trenches in a silicon substrate, comprising the steps of: etching the substrate to form first trenches separated by first silicon ribs; performing a thermal oxidation of the substrate to form a silicon oxide layer around the substrate, to... | 12/06/2005 |
| 6972497 | Optical semiconductor device and method of manufacture An optical semiconductor product includes an integrated circuit chip having an optical sensor in its front face. The chip is attached to a support plate and electrical interconnection is made therebetween. A protective ring is fastened to the front face of the chip,... | 12/06/2005 |
| 6963239 | Device and process for adjustment of an operating parameter of an analog electronic circuit Adjustment of an operating parameter of an analog electronic circuit is effectuated through a set of adjustment resistances (22) that can be configured from outside the circuit to modulate the value of resistances (R1, R2) in the circuit and thu... | 11/08/2005 |
| RE38862 | Oscillator with two outputs in quadrature An oscillator includes four identical cells each producing a phase shift of 90 degrees. The output signal from one cell is applied to the input of the next cell, and with the cells looping back to themselves. Each cell includes a current amplifier and a parallel ind... | 11/01/2005 |
| 6922614 | Energy management system using transmission by remote broadcasting, possibly direct This invention relates to an energy management system in an energy distribution network (DSTR) comprising an energy source (SE1) and a number of energy consumers (K1, K2, K3) distributed in different consumption locations, this system com... | 07/26/2005 |
| 6902970 | Integrated circuit including, and fabrication method for producing, bipolar and MOSFET transistors Production of an insulated-gate field-effect transistor is begun and interrupted at an uncompleted point. Then, a bipolar transistor is almost completely produced. At that point, a return is made to the production of the insulated-gate field-effect transistor. Lastl... | 06/07/2005 |
| 6879205 | Process for controlling the impedance of an output amplification semiconductor device and corresponding output amplifying device An output buffer includes a pair of main complimentary MOS transistors connected to at least one additional pair of complementary MOS transistors connected in parallel to the pair of main transistors by means of a pair of switches controlled by a numeric word for ac... | 04/12/2005 |
| 6870427 | Process and device for controlling the operation of a bipolar transistor in class A The operation of a bipolar transistor is controlled comprising by producing a first voltage that is a product of a static collector current of the bipolar transistor times an emitter resistance. The first voltage is then compared to a predetermined reference voltage... | 03/22/2005 |
| 6864736 | High-voltage inverter amplifier device An intermediate stage of a high-voltage inverting amplifier includes a drive transistor (MB5) of the thin-gate-oxide high-voltage MOS type connected between a supply terminal and the gate of an output transistor (M28). At least one first diode (DB) is ... | 03/08/2005 |
| 6838916 | Method of generating a voltage ramp at the terminals of a capacitor, and corresponding device A ramp capacitor CAP1 has a first terminal connected to a power supply voltage VBAT. A generator circuit is connected to a second terminal of the ramp capacitor and adapted to generate a voltage ramp at the terminals of the ramp capacitor. The generator circu... | 01/04/2005 |
| 6836230 | Device and method for generating digital signals each coding a value of an analog signal A number P of single analog inputs receive an analog signal having a frequency F from a sensor electrode. A single digital output sequentially generates a number P of first digital signals coding the amplitude values of the analog signal. A first multiplexer with a ... | 12/28/2004 |
| 6771054 | Current generator for low power voltage A current generator for the production of a reference current includes a first P type transistor, a source of which is connected to a first pole of a resistor and a gate of which is connected to a second pole of the resistor. The reference current flows in the resis... | 08/03/2004 |
| 6455884 | Radiation hardened semiconductor memory with active isolation regions A radiation hardened memory device includes active gate isolation structures placed in series with conventional oxide isolation regions between the active regions of a memory cell array. The active gate isolation structure includes a gate oxide and polycr... | 09/24/2002 |
