Assignee: SGS-Thomson Microelectronics, Inc.

Location: Carrollton, TX
No. of patents: 596

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Number	Title	Issue Date
6064109	Ballast resistance for producing varied emitter current flow along the emitter's injecting edge A semiconductor device includes an emitter region, a contact region, and a resistive medium. The resistive medium is connected between the contact region and the emitter region. The contact region and the emitter region each include an edge facing each ot...	05/16/2000
6014050	Variable impedance delay elements According to the present invention, by setting the logic state of one or more delay signals to appropriate values, the resistive value of a plurality of power supply delay elements throughout an integrated circuit having distributed circuit blocks may be ...	01/11/2000
5880015	Method of producing stepped wall interconnects and gates A method is provided for making conductive structures whereby an insulating layer is formed over a substrate. A conductive layer is then formed over the insulating layer. A first photoresist layer is formed over the conductive layer, patterned and develop...	03/09/1999
5862301	Motor control with clamped filter output A motor control circuit, including a filter amplifier which includes a clamping circuit to limit the maximum voltage of the filter amplifier. The filter amplifier is clamped to essentially the same level as the following error amplifier, which drives the ...	01/19/1999
5847464	Method for forming controlled voids in interlevel dielectric A method of forming a thick interlevel dielectric layer containing sealed voids formed in a controlled manner, over a substantially planar surface in semiconductor device structure, and the semiconductor structure formed according to such a method. The se...	12/08/1998
5837587	Method of forming an integrated circuit device A mask is used for lightly doped drain and halo implants in an integrated circuit device. The mask exposes only portions of the substrate adjacent to field effect transistor gate electrodes. Since the halo implant is made only near the transistor channels...	11/17/1998
5828242	Comparator with built-in hysteresis A comparator with a built-in offset is disclosed. The comparator includes a bias current circuit, a differential input stage with the built-in offset, and a hysteresis circuit. The built-in offset is generated by using a resistor in the differential input...	10/27/1998
5825060	Polycrystalline silicon resistors for intergrated circuits A resistor structure suitable for use in an SRAM cell is formed from polycrystalline silicon elements. These elements have a cross-section which is less than is normally available for polycrystalline silicon interconnect lines, allowing increased resistan...	10/20/1998
5825167	Linear transconductors An integrated transconductor circuit in which the input transistor(s) passes a current across a reference resistor. This conventional arrangement produces current error terms of Vbe/R and Ib. According to the present invention, these terms are compensated...	10/20/1998
5818292	Bandgap reference circuit According to the present invention, a circuit, utilizing a minimum number of bipolar devices and current mirror scaling devices, generates a bandgap reference voltage. The bandgap voltage generated by the bandgap reference circuit is a function of a plura...	10/06/1998
5813893	Field emission display fabrication method A method for fabricating a field emission display and the resulting display device are disclosed. The method includes the steps of arranging a sealing layer between a face plate and a substrate, heating the sealing layer until the substrate layer adheres ...	09/29/1998
5808960	Circuit and method for tracking the start of a write to a memory cell A circuit and method for determining the exact time at which data begins to be written to a memory cell. A write sensing circuit is connected to a data input line. When data is presented on the data input line for writing to the memory cell, the write sen...	09/15/1998
5808947	Integrated circuit that supports and method for wafer-level testing An integrated circuit is formed on a die that is formed as a detachable part of a semiconductor wafer. The wafer includes both a wafer test-mode path that is operable to carry a wafer test-mode signal and a wafer power-supply path that is operable to carr...	09/15/1998
5804994	Comparator circuit with hysteresis A comparator with hysteresis which has a bias current circuit, a differential input stage, and an output stage is disclosed. The differential input stage uses a parallel transistor and an enabling transistor connected in parallel to one of the differentia...	09/08/1998
5805523	Burst counter circuit and method of operation thereof The decoded address signal is stored in the slave latch. The output of the slave latch is a column select signal. The slave latches are organized in a slave latch circuit which is connected as a counter. Each of the slave latches is treated as a register ...	09/08/1998
5805027	Low current crystal oscillator with fast start-up time Crystal oscillator circuitry provides a very fast start-up function requiring less than 100 mS. The crystal oscillator circuitry enters a stop mode when a control signal transitions from a first logic level to a second logic level thereby causing a crysta...	09/08/1998
5801397	Device having a self-aligned gate electrode wrapped around the channel A semiconductor device includes an insulating support. A strip of semiconductor material has two ends in contact with the insulating support and a midsection extending between the ends. A dielectric layer encircles the midsection, and a conductive layer e...	09/01/1998
5801553	Comparator with built-in hysteresis A comparator with a built-in hysteresis is disclosed. The comparator has a differential input stage, an output stage, and a bias circuit with a hysteresis circuit. The hysteresis circuit selectively applies a bias voltage to the differential input stage t...	09/01/1998
5801563	Output driver circuitry having a single slew rate resistor An output driver circuit an integrated circuit memory device prevents crowbar currents from occurring. The output driver uses just one resistive element having multiple taps so that the amount of silicon area used for slew rate control is minimized. The s...	09/01/1998
5802004	Clocked sense amplifier with wordline tracking A memory device with a sense amplifier enable line having the same resistance and capacitance as a local wordline. The sense amplifier enable line is made out of the same material, has the same layout, and has the same load placed on as a local wordline, ...	09/01/1998
5798980	Pipelined chip enable control circuitry and methodology According to the present invention, the data access time of a chip select condition of a synchronized memory integrated circuit device is pipelined so that it approximates the normal access time of data for the device. The response time to the chip enable...	08/25/1998
5798278	Method of forming raised source/drain regions in an integrated circuit A method is provided for forming a planar transistor of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A transistor encapsulated in a dielectric is formed over a substrate. First source and drain regions are fo...	08/25/1998
5795800	Integrated circuit fabrication method with buried oxide isolation A CMOS SRAM cell in which a patterned SIMOX layer forms a buried oxide beneath the PMOS devices, but not beneath the NMOS devices. Latchup is impossible, and well diffusions are not needed....	08/18/1998
5796545	Device and method for calibrating a time constant of one or more filter circuits A control circuit for providing a stable, adjustable, time constant for use as a master time constant is presented. Used as a master time-constant circuit, this control circuit can ensure multiple slave circuits are precisely calibrated. The circuit inclu...	08/18/1998
5796276	High-side-driver gate drive circuit A high-side gate driving circuit, where a current-mode differential error amplifier is used to regulate the current sourced to the gate. A current path is provided from the gate to the source of the power device, and a constant current is provided to the ...	08/18/1998
5793183	Motor system with interrupted PWM oscillation A brushless DC motor system using PWM switching, in which the PWM switching is temporarily frozen whenever a zero crossing is expected in the back EMF. This avoids disruption of zero-crossing detection due to switching transients from the power transistor...	08/11/1998
5793114	Self-aligned method for forming contact with zero offset to gate A method and structure for self-aligned zero-margin contacts to active and poly-1, using silicon nitride (or another dielectric material with low reflectivity and etch selectivity to oxide) for an etch stop layer and also for sidewall spacers on the gate....	08/11/1998
5793111	Barrier and landing pad structure in an integrated circuit A method is provided for forming an improved landing pad with barrier of a semiconductor integrated circuit, and an integrated circuit formed according to the same. An opening is formed through a first dielectric layer to expose a portion of a diffused re...	08/11/1998
5793247	Constant current source with reduced sensitivity to supply voltage and process variation A current source for generating a current that is relatively stable over variations in the power supply voltage and temperature, and over variations in process parameters is disclosed. The current source includes a bias circuit, for producing a compensati...	08/11/1998
5790462	Redundancy control An integrated circuit memory structure is disclosed where the read and write buses (true and complement) are coupled to redundant input/output select circuits through permanently programmable selection element that can disconnect the read and write busses...	08/04/1998
5784331	Multiple access memory device A memory circuit has a plurality of data storage locations and an address associated with each data storage location. A first decoded address storage circuit stores a first decoded memory address and outputs the stored first decoded memory address. A seco...	07/21/1998
5783958	Switching master slave circuit A master-slave-master latch circuit for loading data vertically or horizontally. A first master latch is coupled to an input terminal for receiving data. Under control of a clock, the data is transferred from the master latch to a slave latch input termin...	07/21/1998
5781390	Integrated supply protection An electrical power protection integrated circuit provides protection against reverse battery and overvoltage conditions that is particularly of value in automotive applications in which reverse battery and overvoltage conditions are commonplace. The elec...	07/14/1998
5781043	Direct current sum bandgap voltage comparator A direct current sum bandgap voltage comparator for detecting voltage changes in a power supply. The direct current sum bandgap voltage comparator includes a summing node, current sources connected to the summing node and the power supply, and an indicato...	07/14/1998
5777449	Torque ripple reduction using back-emf feedback Methods and apparatuses are provided to identify and extract a torque ripple signal found in the back-emf signal from an electric motor. The torque ripple signal is used in a feedback control loop to reduce the amount and effects of torque ripple in the m...	07/07/1998
5777498	Data compensation/resynchronization circuit for phase lock loops A circuit that compensates for delays induced by clock generation logic and distributed clock drivers in phase lock loop applications is disclosed. The circuit is a phase lock loop (PLL) which contains a clock synchronization circuit that operates to sync...	07/07/1998
5773328	Method of making a fully-dielectric-isolated fet A field-effect transistor structure wherein a single patterned thin film semiconductor layer: is monocrystalline, and epitaxially matched to and dielectrically isolated from an underlying body region, in channel locations; and is polycrystalline in source...	06/30/1998
5771195	Circuit and method for replacing a defective memory cell with a redundant memory cell A memory access circuit is provided for isolating a matrix memory cell from and coupling a redundant memory cell to a data line when the matrix memory cell is defective. The memory access circuit includes a matrix switch that is coupled between the matrix...	06/23/1998
5770959	Circuit for providing the power-up state of an electrical device A restart circuit for an electronic device having a first switch, a second switch, an activation device for initiating a restarting operation of the electronic device when at least one of the first switch and the second switch is in a closed position, and...	06/23/1998
5770892	Field effect device with polycrystalline silicon channel A CMOS SRAM cell has a polycrystalline silicon signal line between a common node, which is the data storage node, and the power supply. A field effect device is fabricated within this polycrystalline silicon signal line. The channel of the field effect de...	06/23/1998

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Assignee: SGS-Thomson Microelectronics, Inc.