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Assignee: Qspeed Semiconductor, Inc.


Location: Santa Clara, CA
No. of patents: 10

NumberTitleIssue Date
7452763Method for a junction field effect transistor with reduced gate capacitance
A method for fabricating a dual gate structure for JFETs and MESFETs and the associated devices. Trenches are etched in a semiconductor substrate for fabrication of a gate structure for a JFET or MESFET. A sidewall spacer may be formed on the walls of the trenches t...
11/18/2008
7417266MOSFET having a JFET embedded as a body diode
A field effect transistor, in accordance with one embodiment, includes a metal-oxide-semiconductor field effect transistor (MOSFET) having a junction field effect transistor (JFET) embedded as a body diode. ...
08/26/2008
7348826Composite field effect transistor
A composite field effect transistor, in accordance with one embodiment, includes a zener diode, a junction field effect transistor and a metal-oxide-semiconductor field effect transistor. A gate of the junction field effect transistor is coupled to an anode of the z...
03/25/2008
7268378Structure for reduced gate capacitance in a JFET
A junction field effect transistor (JFET) with a reduced gate capacitance. A gate definition spacer is formed on the wall of an etched trench to establish the lateral extent of an implanted gate region for a JFET. After implant, the gate is annealed. In addition to ...
09/11/2007
7265398Method and structure for composite trench fill
A method and structure for a composite trench fill for silicon electronic devices. On a planar silicon substrate having a first deposited layer of oxide and a second deposited layer of polysilicon, a trench is etched. Deposition and etch processes using a combinatio...
09/04/2007
7262461JFET and MESFET structures for low voltage, high current and high frequency applications
JFET and MESFET structures, and processes of making same, for low voltage, high current and high frequency applications. The structures may be used in normally-on (e.g., depletion mode) or normally-off modes. The structures include an oxide layer positioned under th...
08/28/2007
7238976Schottky barrier rectifier and method of manufacturing the same
A Schottky barrier rectifier, in accordance with embodiments of the present invention, includes a first conductive layer and a semiconductor. The semiconductor includes a first doped region, a second doped region and a plurality of third doped regions. The second do...
07/03/2007
7227242Structure and method for enhanced performance in semiconductor substrates
An etched substrate structure is augmented by conductive material to provide enhanced electrical and/or thermal performance. A semiconductor device substrate comprising active regions defined on a top surface is masked and etched to define a pattern of blind feature...
06/05/2007
7220661Method of manufacturing a Schottky barrier rectifier
A Schottky barrier rectifier, in accordance with embodiments of the present invention, includes a first conductive layer and a semiconductor. The semiconductor includes a first doped region, a second doped region and a plurality of third doped regions. The second do...
05/22/2007
7211845Multiple doped channel in a multiple doped gate junction field effect transistor
A multiple doped channel in a multiple doped gate junction field effect transistor. In accordance with a first embodiment of the present invention, a junction field effect transistor (JFET) circuit structure comprises a vertical channel. The vertical channel compris...
05/01/2007
 
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