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| Number | Title | Issue Date |
| 7903470 | Integrated circuits and discharge circuits An integrated circuit is provided. The integrated circuit includes a memory device and a discharge circuit. The discharge circuit discharges the well voltage line and the first voltage line of the memory device after the end of the erasing period and includes a firs... | 03/08/2011 |
| 7778087 | Memory programming method and data access method A memory programming method is provided. A first programming operation is performed to program a multi level cell from an initial state to a first target state, which corresponds to a storage data and has a first threshold voltage range. A flag bit of the NAND flash... | 08/17/2010 |
| 7679163 | Phase-change memory element A phase-change memory element for reducing heat loss is disclosed. The phase-change memory element comprises a composite layer, wherein the composite layer comprises a dielectric material and a low thermal conductivity material. A via hole is formed within the compo... | 03/16/2010 |
| 7679157 | Image sensor and fabrication method thereof An image sensor has a substrate, a dielectric layer positioned on the substrate, a pixel array including a plurality of pixels defined on the substrate, a shield electrode positioned between any two adjacent pixel electrodes of the pixels, a photo conductive layer p... | 03/16/2010 |
| 7679075 | Phase change memory array and fabrication thereof A phase change memory array is disclosed, comprising a first cell having a patterned phase change layer, and a second cell having a patterned phase change layer, wherein the patterned phase change layer of the first cell and the patterned phase change layer of the s... | 03/16/2010 |
| 7678606 | Phase change memory device and fabrication method thereof A phase change memory device is disclosed. A second conductive spacer is under a first conductive spacer. A phase change layer comprises a first portion substantially parallel to the first and second conductive spacers and a second portion on top of the second condu... | 03/16/2010 |
| 7675054 | Phase change memory devices and methods for fabricating the same Phase change memory devices and methods for fabricating the same are provided. A phase change memory device includes a first conductive electrode disposed in a first dielectric layer. A second dielectric layer is disposed over the first dielectric layer. A phase cha... | 03/09/2010 |
| 7672176 | Writing circuit for a phase change memory A writing circuit for a phase change memory is provided. The writing circuit comprises a driving current generating circuit, a first switch device, a first memory cell and a second switch device. The driving current generating circuit provides a writing current to t... | 03/02/2010 |
| 7671385 | Image sensor and fabrication method thereof An image sensor contains a semiconductor substrate, a plurality of pixels defined on the semiconductor substrate, a photo conductive layer and a transparent conductive layer formed on the pixel electrodes of the pixels in order, and a shield device positioned betwee... | 03/02/2010 |
| 7670869 | Semiconductor device and fabrications thereof A memory device is disclosed. A pillar structure comprises a first electrode layer, a dielectric layer overlying the first electrode layer, and a second electrode layer overlying the dielectric layer. A phase change layer covers a surrounding of the pillar structure... | 03/02/2010 |
| 7660147 | Programming method for phase change memory A programming method for a phase change memory based on the phase transformations between amorphous and crystalline phases is disclosed. The programming method comprises a current pulse with step waveform providing a first crystallization current pulse to the phase ... | 02/09/2010 |
| 7655941 | Phase change memory device and method for fabricating the same A phase change memory device comprising a substrate. A plurality of bottom electrodes isolated from each other is on the substrate. An insulating layer crosses a portion of the surfaces of any two of the adjacent bottom electrodes. A pair of phase change material sp... | 02/02/2010 |
| 7638799 | Image sensor structure with recessed separator layer An image sensor structure includes a plurality of pixels formed on a substrate. Each pixel includes an image senor interconnect structure, a separator layer and an electrode layer, wherein the separator layer has a first thickness an a sidewall of the separator laye... | 12/29/2009 |
| 7569909 | Phase change memory devices and methods for manufacturing the same Phase change memory devices and methods for manufacturing the same are provided. An exemplary embodiment of a phase change memory device comprises a substrate. A dielectric layer is formed over the substrate and a phase change material layer is embedded in the diele... | 08/04/2009 |
| 7569845 | Phase-change memory and fabrication method thereof A phase-change memory comprises a bottom electrode formed on a substrate. A first isolation layer is formed on the bottom electrode. A top electrode is formed on the isolation layer. A first phase-change material is formed in the first isolation layer, wherein the t... | 08/04/2009 |
| 7566895 | Phase change memory device and method for fabricating the same A phase change memory device is provided. The phase change memory device includes a substrate comprising a stacked structure. The stacked structure comprises a plurality of insulating layers and conductive layers. Any two of the conductive layers are spaced apart by... | 07/28/2009 |
| 7538043 | Phase change memory device and fabrication method thereof A phase change memory device comprising an electrode, a phase change layer crossing and contacting the electrode at a cross region thereof, and a transistor comprising a source and a drain, wherein the drain of the transistor electrically connects the electrode or t... | 05/26/2009 |
| 7521372 | Method of fabrication of phase-change memory A phase-change memory and fabrication method thereof. The phase-change memory comprises a transistor, and a phase-change material layer. In particular, the phase-change material layer is directly in contact with one electrical terminal of the transistor. Particularl... | 04/21/2009 |
| 7462902 | Nonvolatile memory A nonvolatile memory is provided. The memory includes a select transistor and a trench transistor. The select transistor is formed on the substrate. The select transistor includes a first gate formed on the substrate and first and second source/drain regions formed ... | 12/09/2008 |
| 7462537 | Fabricating method of an non-volatile memory A method of fabricating a non-volatile memory is provided. A substrate having a trench therein for forming a trench device is provided. Then, a doped metal silicide layer is formed on the substrate in the trench. A heating process is performed to form a source/drain... | 12/09/2008 |
| 7461472 | Half-tone phase shift mask and patterning method using thereof A half-tone phase shift mask including at least a mask substrate, a half-tone phase shift layer and a sheltering layer. The half-tone phase shift layer is a strip-like profile that forms on the surface of the mask substrate. The sheltering layer is formed on the two... | 12/09/2008 |
| 7449902 | Probe system A probe apparatus and a probe system are provided. The probe apparatus uses a larger printed circuit board to dispose a plurality of testers. The layout of each of the testers on the circuit board is modified accordingly, such that more number of the testers can be ... | 11/11/2008 |
| 7446872 | Positioning apparatus and positioning method using the same An apparatus for positioning a transport system and a load port is described, including a signal emitting unit disposed on the transport system and a positioning board on the load port. The signal emitting unit has two positioning points thereon capable of emitting ... | 11/04/2008 |
| 7446370 | Non-volatile memory A non-volatile memory is provided, including a substrate, a control gate, a floating gate, and a select gate. A source region and a drain region are disposed in the substrate. The control gate is disposed on the substrate between the source region and the drain regi... | 11/04/2008 |
| 7445999 | Fabricating method of a flash memory cell A flash memory cell including a first conductive type substrate, a second conductive type well, a patterned film layer, a second conductive type doped region, a tunneling dielectric layer, a plurality of floating gates, an inter-gate dielectric layer and a plurality... | 11/04/2008 |
| 7445998 | Method for fabricating semiconductor device A method for fabricating a semiconductor device is described. The method includes providing a substrate having a trench therein, and a trench device in the trench. The trench device includes two gate structures disposed on the sidewalls of the trench, a doped region... | 11/04/2008 |
| 7445993 | Method of fabricating non-volatile memory A method of fabricating non-volatile memory is provided. A plurality of first memory cells is formed on the memory cell region of a substrate. Each first memory cell comprises a first composite layer, a first gate and a cap layer. There is a gap between two adjacent... | 11/04/2008 |
| 7442998 | Non-volatile memory device A method of fabricating a non-volatile memory is provided. A memory cell array having first memory units and second memory units is formed on a substrate. Then, a source region and a drain region are formed in the substrate on the respective sides of the memory cell... | 10/28/2008 |
| 7442980 | Anti-punch-through semiconductor device An anti-punch-through semiconductor device is provided. The anti-punch-through semiconductor device includes a substrate, at least an isolation region and a plurality of trench devices. The trench device is disposed in the substrate. The trench device includes a sou... | 10/28/2008 |
| 7442561 | Method of piping defect detection A method of piping defect detection is provided. A semiconductor substrate having an active region and an isolation region is provided, a plurality of semiconductor elements are formed on the semiconductor substrate, a dielectric layer is deposited on the semiconduc... | 10/28/2008 |
| 7436489 | Device for testing an exposure apparatus A device and a method for testing an exposure apparatus is disclosed. A testing device includes a substrate, and a plurality of block patterns, each of which has a top area varying with an area of a shot region of the exposure apparatus, having at least two differen... | 10/14/2008 |
| 7436028 | One-time programmable read only memory and operating method thereof A one-time programmable read only memory is provided. The memory includes a substrate, a select transistor, an electrode and a dielectric layer. The select transistor is formed on the substrate. The electrode is formed over the source region of the select transistor... | 10/14/2008 |
| 7435642 | Method of evaluating the uniformity of the thickness of the polysilicon gate layer A method of evaluating the uniformity of the thickness of the polysilicon gate layer is provided. A substrate having a dense trenches area and a sparse trenches area is provided. A plurality of first trench isolation structures are formed in the sparse trenches area... | 10/14/2008 |
| 7433750 | Data tracking method and system applied in semiconductor manufacturing A data tracking method applied in semiconductor manufacturing is provided. Split historical data of a wafer lot is retrieved and it is determined whether the end of lot data of the wafer lot is read. If not, a maximum split number required for a split processing app... | 10/07/2008 |
| 7431260 | Wafer measuring fixture A wafer-measuring fixture suitable for carrying a broken wafer is described. The wafer-measuring fixture comprises a base having a carrying component. The carrying component is used to hold the broken wafer. Furthermore, a plurality of scale marks is set around the ... | 10/07/2008 |
| 7429527 | Method of manufacturing self-aligned contact openings A method of manufacturing self-aligned contact openings is provided. A substrate having a number of device structures is provided and the top of the device structures is higher than the surface of the substrate. A first dielectric layer and a conductive layer are se... | 09/30/2008 |
| 7429503 | Method of manufacturing well pick-up structure of non-volatile memory A method of manufacturing a well pick-up structure of a non-volatile memory is provided. A substrate including a first conductive type well, device isolation structures and dummy memory columns is provided. Each of the dummy memory columns includes a second conducti... | 09/30/2008 |
| 7412090 | Method of managing wafer defects A method of managing wafer defects includes inspecting each chip in a wafer to generate a unit of wafer defect raw data, using a server to integrate the unit of wafer defect raw data to generate a unit of wafer defect distribution data for recording positions, types... | 08/12/2008 |
| 7411276 | Photosensitive device A photosensitive device having at least an insulator layer including a plurality of photoreceiving regions disposed on a substrate. A plurality of conductive patterns is disposed on the insulator layer without covering the photoreceiving regions. A flattened dielect... | 08/12/2008 |
| 7405124 | Fabricating method of non-volatile memory A method for fabricating a non-volatile memory is described. A substrate having isolation structures is provided. These isolation structures protrude from the substrate, and a first mask layer is formed on the substrate between the isolation structures. A second mas... | 07/29/2008 |