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| Number | Title | Issue Date |
| 7440403 | Method and software for calculating rate constraints A method for determining and enforcing rate constraints on process flows in a network, the method comprising receiving at least one process flow. A flow rate vulnerability (FRV) factor and a required bandwidth (RBW) parameter are determined for the at least one proc... | 10/21/2008 |
| 7254632 | Apparatus and method for pattern matching in text based protocol A search engine for matching textual patterns in a traffic stream. The search engine comprises a traffic control unit, a micro-code memory, a comparator and a report memory. The traffic control unit is capable of managing the traffic stream. The micro-code memory is... | 08/07/2007 |
| 7158512 | System and method for scheduling a cross-bar The present invention is a system and a method for connection scheduling of crossbar switches having at least one ingress and at least one egress, each of the egresses is connected to at least one port, comprising at least one scheduler for scheduling matches betwee... | 01/02/2007 |
| 7145874 | Apparatus, method, and software for limiting session rates in a computer network A method of controlling a number of sessions established on a communication network is provided. In the method, at least a first data packet transmitted on the communication network is input, and a new session corresponding to the at least the first data packet is d... | 12/05/2006 |
| 7042886 | Apparatus, method, and computer program for wire-speed classification and pre-processing of data packets in an ATM network A system that efficiently and effectively monitors Internet protocol (IP) data being transferred in an asynchronous transfer mode (ATM) protocol and provides the information necessary according to a list of specified rules and a method and computer program product t... | 05/09/2006 |
| 7027446 | Method and apparatus for set intersection rule matching A method and apparatus for of high-speed and memory efficient rule matching, the rule matching being performed on an m-dimensional universe with each dimension bound by a given range of coordinate values, and a set of rules that apply to an undetermined number of co... | 04/11/2006 |
| 6988160 | Method and apparatus for efficient messaging between memories across a PCI bus The method and apparatus presented are targeted to improve the performance of moving data between memory portions connected by a system bus where writes have higher performance than reads, such as the PCI bus. Due to the PCI bus design, read requests from memories c... | 01/17/2006 |
| 6981108 | Method for locking shared resources connected by a PCI bus A computer system according to the present invention comprises at least two CPUs; at least one shared system resource accessible to each of the CPUs; and shared memory shared by the CPUs. The shared memory has therein a resource locking table, comprising memory elem... | 12/27/2005 |
| 6950393 | Method and apparatus for process flow random early discard in service aware networking systems A packet transfer apparatus for a network system is disclosed. The apparatus comprises a packet receiver that accepts an input of packets from a first network segment, a packet classifier that classifies packets based on their respective process flows, a packet disc... | 09/27/2005 |
| 6831893 | Apparatus and method for wire-speed classification and pre-processing of data packets in a full duplex network A network interface that processes data packets transmitted on a network is provided. The network interface includes a first data path, a second data path, a header processor, a classifier unit, and a plurality of packet processors. The first data path unit inputs d... | 12/14/2004 |
| 6757802 | Method for memory heap and buddy system management for service aware networks A computer system for allocating memory comprises a central processing unit (CPU) for controlling said system, a local memory for said CPU, means for allocating a plurality of memory blocks to tasks executed on said CPU, and block headers for said memory blocks. The... | 06/29/2004 |
| 6700889 | High speed apparatus and method for classifying a data packet based on data values contained in the data packet A device for classifying input data based on the values of first and second data of the input data includes a content addressable memory having one or more rows. A first row includes first and second memories, first and second comparators, and a first hit... | 03/02/2004 |
