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Assignee: Optimaltest Ltd.


Location: Nes-Ziona, IL
No. of patents: 2

NumberTitleIssue Date
7340359Augmenting semiconductor's devices quality and reliability
A method for augmenting quality or reliability of semiconductor units, including providing few populations of semiconductor units that are subject to quality or reliability testing. The populations include few quality or reliability fail candidate populations and ot...
03/04/2008
7208969Optimize parallel testing
Parallel dies testing, mostly implemented on memory ICs—Integrated Circuits, significantly reduced overall test time. In order to minimize the need for physical probing, wafer probe card technology to allow simultaneous probing, ATE—Automated Test Equipment with...
04/24/2007
 
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