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3M employee and church chorister Art Fry needed something to temporarily mark pages in his hymnal. He was in luck because his colleague, Spencer Silver, accidentally developed a glue that was too weak for other purposes. After initially discouraging consumer response, Post-it Notes became a hit in 1979.
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| Number | Title | Issue Date |
| 8183614 | Stack capacitor of memory device and fabrication method thereof The invention provides a method for forming a stack capacitor of a memory device, including providing a substrate, forming a patterned sacrificial layer with a plurality of first openings over the substrate, conformally forming a first conductive layer on the patter... | 05/22/2012 |
| 8178418 | Method for fabricating intra-device isolation structure A method for fabricating intra-device isolation structure is provided, including providing a semiconductor substrate with a mask layer formed thereover. A plurality of first trenches is formed in the semiconductor substrate and the mask layer. A first insulating lay... | 05/15/2012 |
| 8173539 | Method for fabricating metal redistribution layer A method for fabricating a metal redistribution layer is described. A first opening and a second opening are formed in a dielectric layer over a first region and a second region thereof, respectively. A plurality of third openings are formed in the dielectric layer ... | 05/08/2012 |
| 8142086 | Semiconductor manufacturing process A semiconductor manufacturing process is provided. First, a wafer with a material layer and an exposed photoresist layer formed thereon is provided, wherein the wafer has a center area and an edge area. Thereafter, the property of the exposed photoresist layer is va... | 03/27/2012 |
| 8141242 | Method of fabricating gold finger of circuit board A method for fabricating a gold finger of a circuit board is provided. First, a circuit board having a board edge for cutting is provided. Next, a copper conducting wire pattern is formed on the circuit board. The copper conducting wire pattern includes a plurality ... | 03/27/2012 |
| 8105951 | Method for fabricating device pattern A method for fabricating a device pattern includes the following steps. A first pattern having a first density is formed in a pre-determined region on a substrate. The first pattern includes a base portion along a first direction and at least two protruding portions... | 01/31/2012 |
| 8105900 | Manufacturing method of non-volatile memory In a manufacturing method of a non-volatile memory, a substrate is provided, and strip-shaped isolation structures are formed in the substrate. A first memory array including memory cell columns is formed on the substrate. Each memory cell column includes memory cel... | 01/31/2012 |
| 8093639 | Method for fabricating a semiconductor device An embodiment of the invention provides a method for forming a semiconductor device comprising providing a substrate with a pad layer formed thereon. The pad layer and the substrate are patterned to form a plurality of trenches. A trench top insulating layer is form... | 01/10/2012 |
| 8084323 | Stack capacitor of memory device and fabrication method thereof The invention provides a method for forming a stack capacitor of a memory device, including providing a substrate, forming a patterned sacrificial layer with a plurality of first openings over the substrate, conformally forming a first conductive layer on the patter... | 12/27/2011 |
| 8058888 | Test apparatus for electronic device package and method for testing electronic device package A test apparatus for an electronic device package is provided, which includes a test socket having a first portion with a recess for receiving an electronic device package having external terminals arranged in a terminal configuration and a second portion. An interc... | 11/15/2011 |
| 8058702 | Phase change memory cell A phase change memory cell is disclosed, including a first electrode and a second electrode, and a plurality of recording layers disposed between the first and second electrodes. The phase of an active region of each of the recording layers can be changed to a cryst... | 11/15/2011 |
| 8053370 | Semiconductor device and fabrications thereof A method for forming a semiconductor device is disclosed. A substrate comprising a structural layer thereon is provided. A hard mask layer is formed on the structural layer. A photoresist layer is formed on the hard mask layer. The photoresist layer is patterned to ... | 11/08/2011 |
| 8044449 | Memory device with a length-controllable channel A memory device is provided. The memory device includes a substrate, a trench having an upper portion and a lower portion formed in the substrate, a trench capacitor formed in the lower portion of the trench, a collar dielectric layer formed on a sidewall of the tre... | 10/25/2011 |
| 8043884 | Methods of seamless gap filling A method for seamless gap filling is provided, including providing a semiconductor structure with a device layer having a gap therein, wherein the gap has an aspect ratio greater than 4. A liner layer is formed over the device layer exposed by the gap. A first un-do... | 10/25/2011 |
| 8022523 | Multi-chip stack package A multi-chip stack package comprising a first wiring substrate, a first chip, a second wiring substrate, and a second chip is provided. The first wiring substrate is with a front side and a rear side. The first chip is disposed on the front side of the first wiring ... | 09/20/2011 |
| 8019393 | Signal receiver circuit A signal receiver circuit including a transmission gate, a pull-low unit, a boost capacitor, a voltage division unit, and a receiver unit is provided. The transmission gate determines whether to conduct an input signal according to a control signal. The pull-low uni... | 09/13/2011 |
| 8014194 | Phase change memory A phase change memory (PCM) in which the phase change storage element is crystallized by a gradually increasing/decreasing operating current. The PCM comprises a switching circuit, the phase change storage element, a bit select switch, a pulse generating module, and... | 09/06/2011 |
| 8003457 | Fabricating method of vertical transistor A substrate is provided. A pillar protruding out of a surface of the substrate is already formed on the substrate, and a patterned layer is already formed on the pillar. The pillar includes a lower part, a channel region, and an upper part from bottom to top, and th... | 08/23/2011 |
| 7989795 | Phase change memory device and method for fabricating the same A phase change memory device is provided. The phase change memory device comprises a substrate. An electrode layer is on the substrate. A phase change memory structure is on the electrode layer and electrically connected to the electrode layer, wherein the phase cha... | 08/02/2011 |
| 7968937 | Vertical transistor and array with vertical transistors A vertical transistor includes a substrate, a semiconductor structure, a gate, a gate dielectric layer, and a conductive layer. The semiconductor structure is disposed on the substrate and includes two vertical plates and a bottom plate. The bottom plate has an uppe... | 06/28/2011 |
| 7956403 | Two-bit flash memory A flash memory includes a substrate with a protrusion, a control gate, two floating gates, and a dielectric layer. The protrusion extends from a top face of the substrate. The control gate is formed on the protrusion of the substrate and extendedly covers opposite s... | 06/07/2011 |
| 7928490 | Vertical transistor and vertical transistor array A vertical transistor including a substrate, a gate, a base line and a gate dielectric layer is provided. The substrate includes a pillar protruding out of a surface of the substrate. The pillar includes a first doped region, a channel region and a second doped regi... | 04/19/2011 |
| 7923325 | Deep trench device with single sided connecting structure and fabrication method thereof A deep trench device with a single sided connecting structure. The device comprises a substrate having a trench therein. A buried trench capacitor is disposed in a lower portion of the trench. An asymmetric collar insulator is disposed on an upper portion of the sid... | 04/12/2011 |
| 7923286 | Method of fabricating a phase-change memory A phase-change memory comprises a bottom electrode formed on a substrate. A first isolation layer is formed on the bottom electrode. A top electrode is formed on the isolation layer. A first phase-change material is formed in the first isolation layer, wherein the t... | 04/12/2011 |
| 7898883 | Method for controlling access of a memory A memory access control method is provided. By decoding a read-write command, a mode register set (MRS) signal is generated. When the MRS signal is enabled, a latch outputs a bank-select signal. The bank-select signal is then decoded to generate a register-select si... | 03/01/2011 |
| 7898274 | Structure of probe A split-type probe is used to contact with an object under test to detect an electrical characteristic thereof. The probe provided by the present invention has a contact head used to contact with the object under test, and a first needle body and a second needle bod... | 03/01/2011 |
| 7892712 | Exposure method An exposure method suitable for a photolithography process is described. First, a wafer with a group of alignment marks formed thereon is provided. A first alignment step is conducted by using the group of the alignment marks on the wafer to obtain a first calibrati... | 02/22/2011 |
| 7845868 | Apparatus for semiconductor manufacturing process A semiconductor manufacturing process is provided. First, a wafer with a material layer and an exposed photoresist layer formed thereon is provided, wherein the wafer has a center area and an edge area. Thereafter, the property of the exposed photoresist layer is va... | 12/07/2010 |
| 7858470 | Memory device and fabrication thereof A semiconductor memory device. A trench capacitor disposed at a lower portion of a trench in a substrate, in which the trench capacitor comprises a filling electrode layer and a collar dielectric layer surrounding the filling electrode layer. The top of the collar d... | 12/28/2010 |
| 7812625 | Chip test apparatus and probe card circuit A circuit in probe card, which includes a signal line, a detection probe and a plurality of switch modules. A plurality of test response signals form a plurality of chips to be tested are transmitted on the signal line. The detection probe is coupled to the signal l... | 10/12/2010 |
| 7807558 | Method of fabricating a semiconductor device A method of fabricating a semiconductor device is provided. The method of fabricating the semiconductor device comprises providing a substrate. Next, an insulating layer, a conductive layer and a silicide layer are formed on the substrate in sequence. Next, a hard m... | 10/05/2010 |
| 7803701 | Method for fabricating a semiconductor device A method for fabricating the semiconductor device comprises providing a semiconductor substrate having a device region and a testkey region. A first trench is formed in the device region and a second trench is formed in the testkey region. A conductive layer with a ... | 09/28/2010 |
| 7795891 | Tester with low signal attenuation A tester with low signal attenuation and suitable for measuring an electrical characteristic of a subject to be tested includes a circuit board and a first probe. The circuit board has a first surface and a second surface respectively having a first signal transmiss... | 09/14/2010 |
| 7781804 | Non-volatile memory A non-volatile memory disposed on a substrate includes active regions, a memory array, and contacts. The active regions defined by isolation structures disposed in the substrate are extended in a first direction. The memory array is disposed on the substrate and inc... | 08/24/2010 |
| 7768822 | Compensation circuit and memory with the same One embodiment of the invention provides a compensation circuit. The compensation circuit comprises a writing driver, a distance detection circuit, an operating element and an auxiliary writing driver. The writing driver provides a writing current to a writing path.... | 08/03/2010 |
| 7759190 | Memory device and fabrication method thereof A fabrication method of a memory device is disclosed. A substrate having a trench is provided, comprising a trench capacitor, a conductive column, a collar dielectric layer and a top dielectric layer therein. A gate structure with spacers on sidewalls is disposed on... | 07/20/2010 |
| 7742354 | Random access memory data resetting method A random access memory data resetting method is provided. The method includes following steps. First, a state machine resetting signal is provided to a RAM. Next, the state machine resetting signal is extended for a predetermined time period. Afterwards, a data rese... | 06/22/2010 |
| 7742346 | Voltage booster and memory structure using the same A voltage booster and a memory structure using the same are provided. When a data storage unit in the memory structure is in normal operation, all voltage pumps in the voltage booster are turned on for boosting a supply voltage. However, when the data storage unit i... | 06/22/2010 |
| 7732849 | Dynamic random access memory A dynamic random access memory (DRAM) is provided. The DRAM comprises a substrate, a vertical transistor, a deep trench capacitor and a buried strap. The substrate has a trench and a deep trench located on one side of the trench thereon. The vertical transistor is d... | 06/08/2010 |
| 7732337 | Method for manufacturing the shallow trench isolation structure A method for manufacturing a shallow trench isolation (STI) structure is provided. In the method, a substrate is initially provided. Then, a patterned pad layer and a patterned mask layer are successively formed in order on the substrate. After that, a portion of th... | 06/08/2010 |
