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| Number | Title | Issue Date |
| 7134100 | Method and apparatus for efficient register-transfer level (RTL) power estimation Techniques for accelerating power estimation for a circuit comprising generating an RTL description of the circuit. A power model enhanced RTL description of the circuit is generated. A simulator is selected. The power model enhanced RTL description is modified to m... | 11/07/2006 |
| 7058141 | MLSE decoding of PRS type inter-bin interference in receiver-end windowed DMT system An improved method of decoding the Partial-Response Signaling type inter-bin distortion in receiver-end windowed DMT system is disclosed. The method exploits the Maximum Likelihood Sequence Estimation, which yields certain improvements over the conventional DFE-type... | 06/06/2006 |
| 7023938 | Receiver for discrete multitone modulated signals having window function A receiver for improving the performance of conventional Discrete Multitone Modulation (DMT) based Asymmetric Digital Subscriber Line (ADSL) modems, in the presence of noise and/or interference. A demodulator having an FFT followed by a single-tap-per-bin frequency-... | 04/04/2006 |
| 6647381 | Method of defining and utilizing logical domains to partition and to reorganize physical domains One or more logical domains may be utilized for partitioning and reorganizing a single physical domain or a search space constituted by a plurality of physical domains. Logical domains include at least one page selected from the plurality of pages in the ... | 11/11/2003 |
| 6563841 | Per-bin adaptive equalization in windowed DMT-type modem receiver An apparatus for receiving a discrete multi-tone (DMT) signal representative of a series of input symbols and including a plurality of orthogonal sinusoidal subchannels of finite length for each input symbol, the apparatus including a plurality of delay c... | 05/13/2003 |
| 6556571 | Fast round robin priority port scheduler for high capacity ATM switches A novel architecture and implementation of a Round-Robin Scheduler (RRS) for high capacity ATM switches is presented. A port is selected from a set of alternating real-time/non real-time priority ports, based on the priority of the port, the minimum cell-... | 04/29/2003 |
| 6549896 | System and method employing random walks for mining web page associations and usage to optimize user-oriented web page refresh and pre-fetch scheduling A method for estimating an association between the media objects and the seed Web page accessed by a user. The method is employed in the context of a Web space on a network having Web pages and links between those Web pages modeled as a directed graph. Ea... | 04/15/2003 |
| 6535487 | Connection splitting: an efficient way of reducing call blocking in ATM A technique for reducing ATM call blocking is provided that splits wideband connections into multiple low-bandwidth sub-connections and routing them independently through the network. Fragmented network bandwidth is used for supporting calls which are oth... | 03/18/2003 |
| 6516027 | Method and apparatus for discrete multitone communication bit allocation A method and apparatus for allocating bits to subchannels in a discrete multitone environment. The method employs the use of precalculated and prestored look-up tables which take into account a desired bit error rate, signal-to-noise ratio gap for a parti... | 02/04/2003 |
| 6505316 | Peripheral partitioning and tree decomposition for partial scan A method, system and a computer product for a new partial scan technique that incurs significantly less overhead than the full-scan technique and yet achieves very high test coverage in short CPU times are provided. Scan memory elements are selected so th... | 01/07/2003 |
| 6498795 | Method and apparatus for active information discovery and retrieval The present invention is built upon an active network framework and an ontology-based information hierarchy, and, in addition to the features found in current network models, it provides a symmetrical framework for information filtering and binding in the... | 12/24/2002 |
| 6496961 | Dynamic detection and removal of inactive clauses in SAT with application in image computation This disclosure teaches a method of Boolean satisfiability checking (SAT) for a circuit. The method comprises identifying inactive clauses in the conjunctive normal form (CNF) of the circuit and removing the inactive clauses from the CNF.... | 12/17/2002 |
| 6480843 | Supporting web-query expansion efficiently using multi-granularity indexing and query processing A method and apparatus for efficient query expansion using reduced size indices and for progressive query processing. Queries are expanded conceptually, using semantically similar and syntactically related words to those specified by the user in the query... | 11/12/2002 |
| 6467058 | Segmented compaction with pruning and critical fault elimination A method of generating a vector set, said vector set being used for testing sequential circuits. The method comprises selecting a plurality of fault models, identifying a fault list each for each of said plurality of fault models, identifying a vector set... | 10/15/2002 |
| 6424622 | Optimal buffer management scheme with dynamic queue length thresholds for ATM switches A buffer management scheme for an ATM switch where the static and dynamic thresholds are applied appropriately at different levels to ensure efficient and fair usage of buffer memory. A novel dynamic threshold mechanism which, while ensuring fair sharing ... | 07/23/2002 |
| 6415430 | Method and apparatus for SAT solver architecture with very low synthesis and layout overhead A method and apparatus for implementing communication between literals and clauses of a Boolean SAT problem through use of a time-multiplexed pipelined bus architecture rather than hardwiring it using on-FPGA routing resources. This technique allows the c... | 07/02/2002 |
| 6415282 | Method and apparatus for query refinement A method and apparatus for providing a user interface for refining a query applied to a database of images, where a Query Result Visualization Environment allows the user to organize the search results using various techniques. For example, the search res... | 07/02/2002 |
| 6408005 | Dynamic rate control scheduler for ATM networks A Dynamic Rate Control (DRC) scheduler for scheduling cells for service in a generic Asynchronous Transfer Mode (ATM) switch is disclosed. According to the inventive DRC, each traffic stream associated with an internal switch queue is rate-shaped accordin... | 06/18/2002 |
| 6404738 | Dynamic network bandwidth allocation for multimedia applications with soft quality-of-service requirements A new concept of soft quality-of-service (soft-QoS) is developed that bridges the gap between the efficient provision of network-level QoS and the requirements of multimedia applications. Soft-QoS is defined by a satisfaction index (a number that rates us... | 06/11/2002 |
| 6396886 | DMT time-domain equalizer algorithm An apparatus for receiving a discrete multi-tone signal over a communications channel having an impulse response h(n), energy of the impulse response being substantially concentrated in a first band of samples, the apparatus including: a receiver for rece... | 05/28/2002 |
| 6393427 | Personalized navigation trees A method for constructing and maintaining a navigation tree based on external document classifiers is provided. In one embodiment, based on the returned category labels from the classifiers, a navigation tree is constructed by taking usability and user pr... | 05/21/2002 |
| 6389019 | Time-based scheduler architecture and method for ATM networks A flexible and scalable architecture and method that implements dynamic rate control scheduling in an ATM switch. The scheduler shapes a large number of streams according to rate values computed dynamically based on switch congestion information. To handl... | 05/14/2002 |
| 6378096 | On-line partitioning for sequential circuit test generation A method of solving a test generation problem for sequential circuits is disclosed. The method comprises recursively dividing an original test generation problem into smaller problems, wherein said sub-problems may be dependent while one or more of said d... | 04/23/2002 |
| 6343326 | System and method of transferring internet protocol packets using fast ATM cell transport In a method of transmitting an IP packet between a source and a destination through an ATM network which has a node formed by an ATM switch and a packet router, a reception packet or cell is transmitted to the node on an unused or undefined VC and is sent... | 01/29/2002 |
| 6324673 | Method and apparatus for edge-endpoint-based VLSI design rule checking The method and apparatus for performing design rule checking on Manhattan structures in VLSI circuit layouts. The method and apparatus provides an edge-endpoint-based technique for checking the geometry and spacing of the VLSI circuit layout. The edge-end... | 11/27/2001 |
| 6317740 | Method and apparatus for assigning keywords to media objects A method and apparatus are defined for assigning keywords to media objects in files. The media objects include image, video and audio, for example. Various criteria are used for assigning the keywords, including measuring visual distance, measuring syntac... | 11/13/2001 |
| 6304551 | Real-time estimation and dynamic renegotiation of UPC values for arbitrary traffic sources in ATM networks A scheme for determining the usage parameter control (UPC) values for an arbitrary traffic source from observations of its emitted cell stream is disclosed. The UPC values are used in a traffic shaping mechanism based on a dual leaky bucket, which shapes ... | 10/16/2001 |
| 6275969 | Common case optimized circuit structure for high-performance and low-power VLSI designs This present invention presents a Common Case Computation (CCC) based design. A computation circuit with reduced power consumption, said computation circuit having a plurality of components. The components include a general purpose circuit, a common case ... | 08/14/2001 |
| 6247164 | Configurable hardware system implementing Boolean Satisfiability and method thereof Disclosed is a configurable hardware system and method for implementing instance-specific (per-formula) SAT-solver circuits. A template design is provided for producing these circuits on a per-formula basis. The typical hardware requirements for implement... | 06/12/2001 |
| 6240078 | ATM switching architecture for a wireless telecommunications network An ATM switching architecture for a wireless telecommunications network includes two separate units having different functionality. The first unit performs mobility control, wherein a virtual path which contains all virtual channels of a mobile terminal i... | 05/29/2001 |
| 6240423 | Method and system for image querying using region based and boundary based image matching A method and apparatus for querying a database of images, in which the results of the query are based upon a combination of region based image matching and boundary based image matching. Additionally similarity calculations are made between individual res... | 05/29/2001 |
| 6223141 | Speeding up levelized compiled code simulation using netlist transformations Delay-independent cycle-based logic simulation of synchronous digital circuits with levelized compiled code simulation has substantially increased speed. Sweep, eliminate, and factor reduce the number of literals. The use of cofactoring, a register alloca... | 04/24/2001 |
| 6223316 | Vector restoration using accelerated validation and refinement A two phase vector restoration technique which extracts a minimal subsequence from a sequence that detects a chosen set of faults is provided. The disclosed vector restoration technique is useful in static compaction of test sequences and in fault diagnos... | 04/24/2001 |
| 6195786 | Constrained register sharing technique for low power VLSI design A power management method and system targeted toward high-level synthesis of data-dominated behavioral descriptions. The method of the present invention is founded on the observation that variable assignment can significantly affect power management oppor... | 02/27/2001 |
| 6175829 | Method and apparatus for facilitating query reformulation A method and apparatus for verifying a query to provide feedback to users for query reformulation. By utilizing selectivity statistics for semantic and visual characteristics of image objects, query verification "examines" user queries and allows users to... | 01/16/2001 |
| 6157027 | Modular optical fiber color image scanner with all-optical scanner head having side-coupled light guide for providing illumination light to the scanner head A scanner has an optical-electric module, an incoherent fiber bundle, and a scanner head. The incoherent fiber bundle has illumination fibers and pickup fibers. The illumination fibers carry only illumination light from a light source in the O/E module to... | 12/05/2000 |
| 6145106 | State relaxation based subsequence removal method for fast static compaction in sequential circuits A method for fast static compaction in sequential circuits with finite output states by removing subsequences of test vectors from a vector test set. The method has the following steps: (1) relaxing the output states of the sequential circuits; (2) identi... | 11/07/2000 |
| 6141319 | Link based alternative routing scheme for network restoration under failure Alternative routing schemes in high-speed networks ensure fault tolerance in the event of a link failure. An heuristic algorithm, based on maximal-flow algorithm, is first used to partition the network into parts: one part carries regular or primary traff... | 10/31/2000 |
| 6134687 | Peripheral partitioning and tree decomposition for partial scan A method, system and a computer product for a new partial scan technique that incurs significantly less overhead than the full-scan technique and yet achieves very high test coverage in short CPU times are provided. Scan memory elements are selected so th... | 10/17/2000 |
| 6105139 | Controller-based power management for low-power sequential circuits A low-overhead controller-based power management technique that re-specifies control signals to reconfigure existing multiplexer networks and functional units to minimize unnecessary activity. Though the control signals in an RT-level implementation are f... | 08/15/2000 |
