Assignee: Micro Technology, Inc.

Location: Boise, ID
No. of patents: 19

Number	Title	Issue Date
7315465	Methods of operating and forming chalcogenide glass constant current devices The invention is related to methods and apparatus for providing a two-terminal constant current device, and its operation thereof. The invention provides a constant current device that maintains a constant current over an applied voltage range of at least approximat...	01/01/2008
7301804	NROM memory cell, memory array, related devices and methods An array of memory cells configured to store at least one bit per one F2 includes substantially vertical structures providing an electronic memory function spaced apart a distance equal to one half of a minimum pitch of the array. The structures providing...	11/27/2007
7233531	SRAM cell with horizontal merged devices A merged structure SRAM cell is provided that includes a first transistor and a second transistor. The second transistor gate forms a load resistor for the first transistor and the first transistor gate forms a load resistor for the second transistor. Also provided ...	06/19/2007
7183186	Atomic layer deposited ZrTiOfilms After pulsing the second purging gas, a zirconium-containing precursor is pulsed into reaction chamber 220, at block 430. In an embodiment, the zirconium-containing precursor is ZTB. In other embodiments, a zirconium-containing precursor includes but i...	02/27/2007
7180211	Temperature sensor A temperature sensor is comprised of a device adapted to provide a first signal having a parameter responsive to temperature. A generator provides a reference signal having a parameter that is substantially consistent over a preselected temperature range. A comparat...	02/20/2007
7119369	FET having epitaxial silicon growth A field-effect transistor has a channel region in a bulk semiconductor substrate, a first source/drain region on a first side of the channel region, a second source/drain region on a second side of the channel region, and an extension of epitaxial monocrystalline ma...	10/10/2006
7117063	Sorting a group of integrated circuit devices for those devices requiring special testing A method for sorting integrated circuit (IC) devices of the type having a fuse identification (ID) into those devices requiring enhanced reliability testing and those requiring standard testing includes storing fabrication deviation data, probe data, and test data i...	10/03/2006
7107777	MEMS heat pumps for integrated circuit heat dissipation A cooling mechanism within an integrated circuit includes an internal pump for circulating thermally conductive fluid within closed loop channels. The cooling channels are embedded within an integrated circuit die, such as in interlevel dielectric layers between met...	09/19/2006
6809766	Look ahead rolling shutter system in CMOS sensors A shutter system for a pixel array is disclosed. The system includes a read shift register, first and second reset shift registers, and a plurality of logic gates. The read shift register is configured to sequentially count rows of the pixel array from top to bottom...	10/26/2004
6744084	Two-transistor pixel with buried reset channel and method of formation A two-transistor pixel of an imager has a reset region formed adjacent a charge collection region of a photodiode and in electrical communication with a gate of a source follower transistor. The reset region is connected to one terminal of a capacitor which integrat...	06/01/2004
6625048	Architecture, package orientation and assembly of memory devices Memory chips containing multiple-bank memory devices are arranged to be mounted in a memory package with the major axis of the memory chip aligned substantially parallel with the major axis of its memory package. Memory devices of various embodiments cont...	09/23/2003
6509627	Flowable germanium doped silicate glass for use as a spacer oxide The invention is a method for constructing an integrated circuit structure and an apparatus produced by the method. The method generally comprises constructing an integrated circuit structure by disposing a layer of doped oxide, the dopant being iso-elect...	01/21/2003
6473311	Gate area relief strip for a molded I/C package A method and device for providing a relief area on the surface of a molded I/C package. Specifically, a method of reducing delamination at the gate area of a molded I/C package by disposing an area of patterned metal traces on the substrate surface to for...	10/29/2002
6238223	Method of depositing a thermoplastic polymer in semiconductor fabrication A method of applying a dispersion (which may be in the form of a paste) of particles of a thermoplastic polymer in a liquid medium (i.e., liquid carrier) onto semiconductor wafers, dies, lead frames, and printed circuit boards, for example, to form bondin...	05/29/2001
6072209	Four F² folded bit line DRAM cell structure having buried bit and word lines A memory cell structure for a folded bit line memory array of a dynamic random access memory device includes buried bit and word lines, with the access transistors being formed as a vertical structure on the bit lines. Isolation trenches extend orthogonal...	06/06/2000
5973974	Regressive drive sense amplifier A pull-down circuit in a sense amplifier, such a sense amplifier in a memory integrated circuit, includes a pull-down transistor having a drain coupled to a common node, a gate, and a source coupled to ground. An inverter provides a gate control signal to...	10/26/1999
5954912	Rotary coupling A rotary coupling for use in an apparatus for chemical mechanical planarization of material substrates. The coupling has a housing defining a chamber therein. A housing passage is formed through the housing and communicates with the chamber and a fluid so...	09/21/1999
5802131	Multiport serial access self-queuing memory switch A multiport switch buffers and transfers cells of digital data. It provides the ability to control the synchronization of the ports in a distributed manner. Each port is associated with a counter that starts counting when transmission by either the port i...	09/01/1998
5716873	Method for cleaning waste matter from the backside of a semiconductor wafer substrate A method for manufacturing a semiconductor device on a wafer that has a substrate with a front side and a backside, and an accumulation of waste matter on the backside of the substrate. In a method of the invention, a cover layer is deposited over the fro...	02/10/1998

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Assignee: Micro Technology, Inc.