Bizarre Patents
Wearable Device For Feeding and Observing Birds and Other Flying Animals
A device for feeding and observing flying animals comprising a hat, a support mounted on the hat and extending outward from the hat, and a feeder mounted on the support.
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| Number | Title | Issue Date |
| 8185784 | Drive health monitoring with provisions for drive probation state and drive copy rebuild The present disclosure is directed to a system and method for monitoring drive health. A method for monitoring drive health may comprise: a) conducting a predictive fault analysis for at least one drive of a RAID; and b) copying data from the at least one dri... | 05/22/2012 |
| 8184660 | Transparent methods for altering the video decoder frame-rate in a fixed-frame-rate audio-video multiplex structure An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a multiplexed signal at a fixed frame-rate in response to a video input signal. The multiplexed signal comprises one of (i) a pre-defined packet which corre... | 05/22/2012 |
| 8181147 | Parametric data-based process monitoring for adaptive body bias control Various embodiments of systems and methods are disclosed for providing adaptive body bias control. One embodiment comprises a method for adaptive body bias control. One such method comprises: modeling parametric data associated with a chip design; modeling critical ... | 05/15/2012 |
| 8181144 | Circuit timing analysis incorporating the effects of temperature inversion Methods and apparatus for increasing the accuracy of timing characterization of a circuit including one or more cells in a cell library are provided. One method includes the steps of: performing cell library timing characterization for each of the cells in the circu... | 05/15/2012 |
| 8181138 | Generation of an extracted timing model file A system, apparatus and method for generating extracted timing model files, such as macro library files, are disclosed. A user interface or data template is provided to an engineer that allows for the population of data within particular fields related to timing cha... | 05/15/2012 |
| 8181096 | Configurable Reed-Solomon decoder based on modified Forney syndromes A method of configurable decoding is disclosed. The method generally includes the steps of (A) receiving a variable value in a configuration signal, (B) calculating a plurality of first syndromes corresponding to a particular codeword of a plurality of codewords rec... | 05/15/2012 |
| 8181078 | Methods and system for simplified SAS error recovery Methods and systems for simplified error recovery in a SAS device. A SAS device (e.g., a SAS/SSP target device such as a storage device) enhanced in accordance with features and aspects hereof NAKs a received frame that has an error and then NAKS all subsequently re... | 05/15/2012 |
| 8181062 | Method to establish high level of redundancy, fault tolerance and performance in a raid system without using parity and mirroring An apparatus comprising a logically contiguous group of at least two drives, a loop and a compression/decompression circuit. Each of the drives comprises (i) a first region configured to store compressed data of a previous drive and (ii) a second region configured t... | 05/15/2012 |
| 8180935 | Methods and apparatus for interconnecting SAS devices using either electrical or optical transceivers Methods and systems for encoding and/or decoding digital signals representing serial attached SCSI (SAS) out of band (OOB) signals exchanged over an optical communication between two SAS devices. A SAS OOB signal to be transmitted from a first SAS device to a second... | 05/15/2012 |
| 8179807 | In-band communication of alarm status information in a synchronous transport communication system Techniques are disclosed for in-band communication of alarm status information or other information between physical layer devices comprising a working device and a protection device in a network-based communication system. In one aspect, a protection receive signal... | 05/15/2012 |
| 8179094 | Device and method for improved battery condition learn cycle Embodiments of the invention include a device and method for improved battery learn cycles for battery backup units within data storage devices. The backup unit includes a first battery pack, a corresponding charge capacity gauge, one or more second battery packs, a... | 05/15/2012 |
| 8178909 | Integrated circuit cell architecture configurable for memory or logic elements An improved integrated circuit cell architecture is provided for configurability between a memory cell or logic elements. The cell architecture is configured on variable layers above a first layer of metal, with the first layer of metal and layers therebelow reserve... | 05/15/2012 |
| 8176492 | Synchronous adaption of asynchronous modules A program disposed on a computer readable medium, having a main program with a first routine for issuing commands in an asynchronous manner and a second routine for determining whether the commands have been completed in an asynchronous manner. An auxiliary program ... | 05/08/2012 |
| 8176404 | Systems and methods for stepped data retry in a storage system Various embodiments of the present invention provide systems and methods for data processing retries. As an example, a data processing retry circuit is discussed that includes a stepped erasure window register, and an erasure flag set circuit. The stepped erasure wi... | 05/08/2012 |
| 8176400 | Systems and methods for enhanced flaw scan in a data processing device Various embodiments of the present invention provide systems and methods for flaw scan in a data processing system. As one example, a data processing system is disclosed that includes a data detector circuit, a bit sign inverting circuit, and an LDPC decoder circuit... | 05/08/2012 |
| 8176399 | Using short burst error detector in a queue-based system A system, method, and device for detecting short burst errors in a queue-based system is disclosed. A first detector performs a data detection on a first input data set at a first time and on a second input data set at a second time. A second detector performs a dat... | 05/08/2012 |
| 8176397 | Variable redundancy reed-solomon encoder A fixed length Reed-Solomon encoder is configured to produce a first fixed number of redundant symbols. The fixed length Reed-Solomon encoder is configured with an encoding polynomial that is fixed. A symbol preprocessor maps each input data symbol to a transformed ... | 05/08/2012 |
| 8176390 | Single XOR operation WEAVER reconstruction of a failed drive of a RAID Several methods and apparatus to single XOR operation weaver reconstruction of a failed drive of a raid are disclosed. A failed drive of the drive group implemented in a WEAVER code with an (n,t,t) layout is determined. A set of scatter/gather lists is produced from... | 05/08/2012 |
| 8176218 | Apparatus and methods for real-time routing of received commands in a split-path architecture storage controller Apparatus and methods for real-time routing of received frames in a split-path architecture storage controller. In one exemplary embodiment, a split-path storage controller comprises a soft-path I/O processor for processing of any received frames and comprises a fas... | 05/08/2012 |
| 8176217 | System and method for implementing a storage protocol with initiator controlled data transfer The present invention is a system for implementing a storage protocol with initiator controlled data transfer including a host device, a target device and an intermediate device, the intermediate device for communicatively coupling the host device and the target dev... | 05/08/2012 |
| 8176207 | System debug of input/output virtualization device An adapter card for testing the functionality of a particular interface configuration may include an interface core. The interface core may comprise an electric circuit including electronic components and control logic for interfacing with an information handling sy... | 05/08/2012 |
| 8175201 | Systems and methods for adaptive equalization in recording channels Various embodiments of the present invention provide systems and methods for performing adaptive equalization. For example, various embodiments of the present invention provide methods for adaptive equalization that include providing a data processing system with an... | 05/08/2012 |
| 8174949 | Systems and methods for format efficient timing recovery in a read channel Various embodiments of the present invention provide systems, methods and media formats for processing user data derived from a storage medium. As an example, a system is described that includes a storage medium with a series of data. The series of data includes a s... | 05/08/2012 |
| 8174912 | Systems and methods for circular buffering control in a memory device Various embodiments of the present invention provide systems, methods and circuits for memories and utilization thereof. As one example, memory devices are disclosed that include a plurality of non-volatile memory blocks, and a memory write circuit. The memory write... | 05/08/2012 |
| 8171356 | Reducing writes, and estimating and displaying estimated remaining lifetime of non-volatile memories Techniques are taught for reducing writes, and estimating and displaying estimated remaining lifetime of non-volatile memories. The write reducing is optionally via determining a difference between write operation results and data stored in the non-volatile memories... | 05/01/2012 |
| 8171246 | Ranking and prioritizing point in time snapshots A storage area network system having a data storage means for storing computer data, a storage manager routine running on a client, the storage manager routine having functional elements for directing snapshots to be taken of the computer data on the data storage me... | 05/01/2012 |
| 8171178 | Scaling of small computer system interface input output (SCSI I/O) referrals A command is issued to a first data storage system for addressing a set of data and at least one of a first referral response including a referral to at least a second data storage system or at least a first subset of the set of data and the first referral response ... | 05/01/2012 |
| 8171176 | Method for selective replication of physical devices on a virtual self-configuring zoning expander Disclosed is a method and a SAS controller device that abstract access from one or more virtual machines operating on a host system to SAS physical devices connected to the SAS controller without a routing table for port-to-port messaging on the SAS controller. An e... | 05/01/2012 |
| 8170107 | Flexible reduced bandwidth compressed video decoder A method of decoding a video bitstream is disclosed. The method generally includes the steps of (A) buffering the video bitstream in a main memory, the video bitstream comprising a first residual block based on a first motion compensated block, the first motion comp... | 05/01/2012 |
| 8169918 | Received information monitor adaptive to multiple monitoring modes in a communication device An apparatus for monitoring of received information in a communication device comprises a first buffer having a plurality of storage elements adapted to store respective portions of the received information, a second buffer coupled to the first buffer and having a p... | 05/01/2012 |
| 8169908 | Method for discarding corrupted data packets in a reliable transport fabric A method for discarding perpetually-rejected packets in a fabric-based interconnect having a reliable physical layer is disclosed. A transmitting component keeps a count of the number of negative acknowledgements (NAKs) it receives from the receiving component for p... | 05/01/2012 |
| 8169726 | Disk file preamplifier frequency-response and time delay compensation An apparatus including one or more reader circuits, one or more writer circuits, and a loopback channel. The one or more reader circuits may be configured to read data from a magnetic medium. The one or more writer circuits may be configured to write data to the mag... | 05/01/2012 |
| 8166478 | System and apparatus for utilizing a virtual machine to support redundancy in a virtual machine manager pair A storage array controller may include a virtual machine manager for managing a storage array application virtual machine and a dedicated multiplexer virtual machine. The storage array application virtual machine and the dedicated multiplexer virtual machine may be ... | 04/24/2012 |
| 8166441 | Low depth circuit design A method of designing a logic circuit based on one of the functions of the form fn=x1 (x2 & (x3 (x4 & . . . xn . . . ))) and f′n=x1 & (x2 (x3 & (x... | 04/24/2012 |
| 8166440 | Basic cell architecture for structured application-specific integrated circuits A basic cell circuit architecture having plurality of cells with fixed transistors configurable for the formation of logic devices and/or single/dual port memory devices within a structured ASIC is provided. Different configurations of ensuing integrated circuits ar... | 04/24/2012 |
| 8166428 | Synthesized logic replacement Disclosed is a method of improving a synthesized circuit design comprising searching the synthesized circuit design for a first instance of a first pattern of gates. The first instance is removed from the synthesized circuit design. The first instance is replaced wi... | 04/24/2012 |
| 8166258 | Skip operations for solid state disks Described embodiments provide skip operations for transferring data to or from a plurality of non-contiguous sectors of a solid-state memory. A host layer module sends data to, and receives commands from, a communication link. Received commands are one of read reque... | 04/24/2012 |
| 8166233 | Garbage collection for solid state disks Described embodiments provide a method of recovering storage space on a solid state disk (SSD). An index and valid page count are determined for each block of a segment of an SSD. If the valid page count of at least one block in the segment is zero, a quick clean is... | 04/24/2012 |
| 8165291 | Random seed stability with fuses A circuit for stabilizing soft bits in a bit stream, the circuit having a first register to receive an initial read of the bit stream, a second register to receive a subsequent read of the bit stream, a comparator to compare the initial read of the bit stream to the... | 04/24/2012 |
| 8161447 | Automation of tie cell insertion, optimization and replacement by scan flip-flops to increase fault coverage A method for designing an integrated circuit is disclosed. The method generally comprises the steps of (A) splitting a design layout of the integrated circuit into a plurality of tiles, (B) adding a plurality of tie-to cells to the design layout, wherein at least on... | 04/17/2012 |
