Assignee: LG Semicon Co., Ltd.

Location: Cheong-ju, KR
No. of patents: 23

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Number	Title	Issue Date
6100566	Multi-layer semiconductor device and method for fabricating the same A multi-layer semiconductor having a semiconductor substrate, a first gate electrode formed over the substrate, first source and drain electrodes in the substrate on both sides of first and second gate electrodes, the second source and drain electrodes co...	08/08/2000
6090658	Method of forming a capacitor including a bottom silicon diffusion barrier layer and a top oxygen diffusion barrier layer Capacitor in a semiconductor device suitable for diffusion prevention between a lower electrode and a polysilicon and oxidation prevention of a barrier metal layer and a method for manufacturing the same are disclosed. The capacitor in a semiconductor dev...	07/18/2000
6087718	Stacking type semiconductor chip package A stacked-type semiconductor chip package of a lead on chip structure which is modified for stacking chips in the package, including a plurality of leads each having an inner lead portion and an outer lead portion extending from the inner lead portion, a ...	07/11/2000
5965920	Input protection circuit An input protection circuit which makes it possible to protect an internal circuit with respect to withstanding an electro-static charge by forming multiple discharge loops by connecting each input pad via an input protection circuit. The circuit includes...	10/12/1999
5949705	DRAM cell, DRAM and method for fabricating the same The DRAM cell includes a first transistor, a second transistor, and a capacitor. The first and second transistors each have a gate, a source, and a drain electrode. The gate electrode of the second transistor is connected to one of the source and drain el...	09/07/1999
5949735	Row decoder for semiconductor memory device The row decoder includes an internal node and an output node. A decoding unit receives a plurality of externally-applied address signals and pulls down the internal node to a logic low voltage when the plurality of address signals have an active state. A ...	09/07/1999
5945861	Clock signal modeling circuit with negative delay The circuit of the present invention prevents a multi-locking phenomenon, reduces power consumption and provides an accurately locked internal clock signal. A delay unit sequentially delays an external clock signal through a plurality of unit delay termin...	08/31/1999
5915176	Method of making floating gate based memory device Semiconductor memory device and method is provided for a stacked gate type flash semiconductor memory device. The semiconductor memory device improves programming and erasing operation efficiency. A gate oxide layer and a floating gate are formed to be st...	06/22/1999
5909133	Clock signal modeling circuit An improved clock signal modeling circuit capable of more quickly generating an internal clock signal in an external clock signal without using a phase locked loop and a delay locked loop, which includes a delay unit for receiving an external clock signal...	06/01/1999
5889724	Word line driving circuit for semiconductor memory device and method A word line driving circuit for a semiconductor memory is provided that drives a corresponding word line of a first number of word lines coupled to a plurality of memory cells based on a memory address signal generated from a more significant controller. ...	03/30/1999
5883846	Latch type sense amplifier having a negative feedback device A latch type sense amplifier having negative feedback means for use in a memory device includes a first switching unit which is turned on/off by an enable signal and initializes a system operation at a turn-on operation; a second switching unit which is t...	03/16/1999
5883845	Semiconductor memory having bitline precharge circuit A semiconductor device is provided having a symmetric bitline precharge circuit. Sizes of a parasitic devices near transistors lying symmetrically in the bitline precharge circuit are symmetrical to each other. Further, a layout area occupied by the bitli...	03/16/1999
5877990	Semiconductor memory device and method A semiconductor memory device and method are provided that enhance data output speed of a DRAM or the like by reducing the time difference between the data output operation from a preceding word line and the data output operation from a succeeding word li...	03/02/1999
5869853	Linear charge-coupled device having improved charge transferring characteristics A linear CCD (charge-coupled device) including: a photodiode-array having a plurality of photodiodes for converting incident light plural charges, respectively; and a charge transfer part for transferring the charges of the photodiodes during a first phas...	02/09/1999
5851708	Method for fabricating phase shifting mask and a phase shifting mask The method for fabricating a phase-shifting mask includes the steps of providing a substrate having a light shielding layer and a phase-shifting light transmitting layer sequentially formed thereon, first patterning the light shielding layer and the phase...	12/22/1998
5834372	Pretreatment of semiconductor substrate A method for pretreating a semiconductor surface, comprising the steps of: placing a titanium nitride substrate in a reaction chamber and subjecting the reaction chamber to vacuum; purging the reaction chamber with an inert gas selected from the group con...	11/10/1998
5817367	Method of forming a thin film of copper A method of forming a thin film of copper on a substrate includes a first step of conducting a chemical vapor deposition (CVD) process using a metal organic (MO) source while applying a first bias voltage to the surface of the substrate and a second step ...	10/06/1998
5712633	Conversion characteristic test circuit for analog/digital converter and method thereof A conversion characteristic test circuit and method for an A/D converter uses a DNL error, an INL error, and a dynamic conversion characteristic to analyze digital data output from an A/D converter for judging an operation state of the A/D converter. The ...	01/27/1998
5687129	Method and circuit for supplying memory IC power A circuit for supplying power to an IC memory card by using primary and secondary batteries as a data preserving power means for the memory IC according to the present invention, includes: primary and secondary batteries; a secondary battery charging circ...	11/11/1997
5677225	Process for forming a semiconductor memory cell In the present invention, a cylindrical or a cup shaped capacitor electrodes is formed within a trench. The process may include the steps of: (a) forming a trench in a semiconductor substrate, filling a first material layer which contains impurity materia...	10/14/1997
5660955	Phase shift mask and manufacturing method thereof A phase shift mask is disclosed, which includes a substrate, a plurality of first light shading film pairs formed at an interval on the substrate, a plurality of phase shift layers formed on the first light shading film pairs, and a plurality of second li...	08/26/1997
5604140	Method for forming fine titanium nitride film and method for fabricating semiconductor element using the same A method for forming a fine titanium nitride film and a method for fabricating a semiconductor element using this method. The method for forming a fine titanium nitride film includes the steps of depositing a titanium nitride film on a semiconductor subst...	02/18/1997
5501999	Process for formation of capacitor for DRAM cell A DRAM cell and a process for formation of a capacitor of a DRAM cell. The present invention provides a lower plate electrode consisting of a first conductive layer formed upon a first inter-layer insulating layer, the first inter-layer insulating layer c...	03/26/1996

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Assignee: LG Semicon Co., Ltd.