Did You Know...
...that the inventor of the electric motor was a blacksmith named Thomas Davenport? Described as "a brilliantly unsuccessful inventor", Davenport invented the first rotary electric motor. In 1836 he headed out -- on foot -- from his Vermont home to file a patent application at the Patent Office in Washington, D.C. By the time he got there, he had squandered away his money and couldn't afford the $30 filing fee so he turned around and went home. When he later mailed in his application with money he'd raised, the Patent office was destroyed in a fire. He did finally get credit for his invention on Feb. 5, 1837.
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| Number | Title | Issue Date |
| 7975272 | Thread queuing method and apparatus In some embodiments, a method includes receiving a request to generate a thread and supplying a request to a queue in response at least to the received request. The method may further include fetching a plurality of instructions in response at least in part to the r... | 07/05/2011 |
| 7975263 | Method and apparatus for generating run time profiles for program compilation A method for managing a profile includes generating an initial profile of code using an initial sampling frequency. An information entropy value of the profile is computed. A representative profile of the code is determined from additional profiles using a sampling ... | 07/05/2011 |
| 7975250 | Allocation of combined or separate data and control planes A dual mesh interconnect network in a heterogeneous configurable circuit may be allocated between data communication and control communication. ... | 07/05/2011 |
| 7975161 | Reducing CPU and bus power when running in power-save modes A processing system includes a bus and a processor whose core is constrained to have one or more core clock signal frequencies no lower than a predetermined multiple of the lowest of one or more bus clock signal frequencies. In a power-save mode, the processor is ab... | 07/05/2011 |
| 7975158 | Noise reduction method by implementing certain port-to-port delay A noise reduction method by implementing certain point-to-point delay is disclosed. In this regard a method is introduced comprising determining a frequency of a greatest noise on a high-speed data link when turning on a power delivery network, determining a delay t... | 07/05/2011 |
| 7975129 | Selective hardware lock disabling Controlling a reorder buffer (ROB) to selectively perform functional hardware lock disabling (HLD) is described. One apparatus embodiment includes a unit to enable an ROB to selectively disable a lock upon Identifying a lock acquire operation (LAO) associated with a... | 07/05/2011 |
| 7975040 | Systems and methods for virtualizing functions and decentralizing service delivery in a flat network of interconnected personal devices Systems and methods are described herein to virtualize functions and decentralize services in a flat-graph network of client devices. Other embodiments include apparatus and systems of devices comprising virtual node modules to perform a variety of service functions... | 07/05/2011 |
| 7974416 | Providing a secure execution mode in a pre-boot environment In one embodiment, the present invention includes a method to establish a secure pre-boot environment in a computer system; and perform at least one secure operation in the secure environment. In one embodiment, the secure operation may be storage of a secret in the... | 07/05/2011 |
| 7974312 | Compressed medium access control (MAC) header structure for MAC overhead reduction in mobile worldwide interoperability for microwave access (WiMAX) systems A packet data structure comprising a compressed medium access control (MAC) header structure capable of significantly reducing MAC header overhead for small payload applications, such as Voice over Internet Protocol (VoIP) and interactive gaming and to increase the ... | 07/05/2011 |
| 7974258 | Adaptive mode transmitter for PAPR reduction and link optimization An adaptive mode transmitter enables either OFDMA or SC-FDMA modulation schemes to be used during transmission of a wireless signal, such as during mobile phone use. The modulation scheme is selected automatically, and is based on characteristics of the transmitting... | 07/05/2011 |
| 7974242 | Device, system, and method of channel quality indication Device, system, and method of channel quality indication. In some demonstrative embodiments a method may include, for example, calculating a plurality of channel-quality-indicator values corresponding to a plurality of sub-channels associated with a mobile communica... | 07/05/2011 |
| 7974225 | Providing extended range modes as part of the 802.11n standard An extended range preamble is disclosed, for transmission between extended range 802.11n devices. The extended range preamble consists of a high-throughput signal field, in which a modulation coding scheme rate and payload length are specified by the transmit... | 07/05/2011 |
| 7974178 | Pilot method for 802.16m A novel pilot method employs a cluster having a particular arrangement of pilot sub-carriers to optimize transmissions under 802.16 m, or WiMAX-II. The optimally configured cluster features equal pilot density per OFDM symbol, two or more pilot sub-carriers per clus... | 07/05/2011 |
| 7974174 | Transformer for determining the state of a variable resistive layer in a material stack A method and an apparatus for detecting a number of variation in resistance within a material stack in response to a scanning and injection of a non-contacting electron stream into a material stack, the material stack having a first conductive contact layer, a varia... | 07/05/2011 |
| 7974027 | Plane waves to control critical dimension The present invention describes an aperture including: an opaque plate; two sliver openings located in the opaque plate, the two sliver openings having rectangular shapes, the two sliver openings being parallel to each other. The present invention further des... | 07/05/2011 |
| 7973518 | Low noise voltage regulator In general, in one aspect, the disclosure describes a voltage regulator (VR) that includes a first amplifier receiving a first reference voltage and a feedback voltage as inputs. A second amplifier receiving a second reference voltage and an output of the first ampl... | 07/05/2011 |
| 7973407 | Three-dimensional stacked substrate arrangements Three-dimensional stacked substrate arrangements with reliable bonding and inter-substrate protection. ... | 07/05/2011 |
| 7973389 | Isolated tri-gate transistor fabricated on bulk substrate A method of forming an isolated tri-gate semiconductor body comprises patterning a bulk substrate to form a fin structure, depositing an insulating material around the fin structure, recessing the insulating material to expose a portion of the fin structure that wil... | 07/05/2011 |
| 7968957 | Transistor gate electrode having conductor material layer Various embodiments of the invention relate to a PMOS device having a transistor channel of silicon germanium material on a substrate, a gate dielectric having a dielectric constant greater than that of silicon dioxide on the channel, a gate electrode conductor mate... | 06/28/2011 |
| 7968952 | Stressed barrier plug slot contact structure for transistor performance enhancement A method for forming a slot contact structure for transistor performance enhancement. A contact opening is formed to expose a contact region, and a slot contact is disposed within the contact opening in order to induce a stress on an adjacent channel region. In an e... | 06/28/2011 |
| 7968457 | Sandwiched metal structure silicidation for enhanced contact Embodiments of an apparatus and methods for forming enhanced contacts using sandwiched metal structures are generally described herein. Other embodiments may be described and claimed. ... | 06/28/2011 |
| 7968395 | Systems and methods for reducing contact to gate shorts A method for reducing contact to gate shorts in a semiconductor device and the resulting semiconductor device are described. In one embodiment, a gate is formed on a substrate, a contact is formed on the gate and the substrate, and an insulator is formed between the... | 06/28/2011 |
| 7968392 | Tri-gate integration with embedded floating body memory cell using a high-K dual metal gate Dual-gate memory cells and tri-gate CMOS devices are integrated on a common substrate. A plurality of silicon bodies are formed from a monocrystalline silicon on the substrate to define a plurality of transistors including dual-gate memory cells, PMOS transistors, a... | 06/28/2011 |
| 7967942 | Polymer matrices for polymer solder hybrid materials Embodiments of the present invention provide various polymeric matrices that may be used as a binder matrix for polymer solder hybrid thermal interface materials. In alternative embodiments the binder matrix material may be phophozene, perfluoro ether, polyether, or... | 06/28/2011 |
| 7966624 | Using message passing interface (MPI) profiling interface for emulating different MPI implementations In one embodiment, the present invention includes a method for receiving an application linked against a first application binary interface (ABI), providing an ABI wrapper associated with the application, and binding the application to a native message passing inter... | 06/21/2011 |
| 7966609 | Optimal floating-point expression translation method based on pattern matching Embodiments of the present invention include code generation methods. In one embodiment, a table of patterns is generated. Each pattern in the table includes an FMA (fused multiply-add) DAG (Directed Acyclic Graph), a canonical form equivalent of the FMA DAG, and a ... | 06/21/2011 |
| 7966606 | Methods and apparatus for generating branchless code for select statements In one embodiment, the present invention includes a method for determining whether a select statement can be transformed, and if so selecting a first or second transformation operation based on compiler-evaluated values for certain variables of the select statement,... | 06/21/2011 |
| 7966511 | Power management coordination in multi-core processors Systems and methods of managing power provide for issuing a first operating requirement from a first processor core and issuing a second operating requirement from a second processor core. In one embodiment, the operating requirements can reflect either a power poli... | 06/21/2011 |
| 7966506 | Saving power in a computer system A power management unit (PMU) may promote a processing core from a working state to a first non-working power saving state after receiving a signal from an automatic core C-state promotion (ACCP) unit. An OS component may detect the idling of the processing core and... | 06/21/2011 |
| 7966482 | Interleaving saturated lower half of data elements from two source registers of packed data An apparatus includes an instruction decoder, first and second source registers and a circuit coupled to the decoder to receive packed data from the source registers and to pack the packed data responsive to a pack instruction received by the decoder. A first packed... | 06/21/2011 |
| 7966476 | Determining length of instruction with escape and addressing form bytes without evaluating opcode A method, apparatus and system are disclosed for decoding an instruction in a variable-length instruction set. The instruction is one of a set of new types of instructions that uses a new escape code value, which is two bytes in length, to indicate that a third opco... | 06/21/2011 |
| 7966458 | Method and apparatus for controlling a primary operating system and an appliance operating system on the same machine One embodiment includes a personal computer device comprising at least one machine to execute a primary user operating system, a first physical memory to be used by the primary user operating system, at least one appliance operating system that is independent from t... | 06/21/2011 |
| 7966456 | Method for reducing number of writes in a cache memory Disclosed is a method for reducing number of writes in a write-back non-volatile cache memory. The method comprises: writing a plurality of data in the cache memory, wherein cache lines meta data for each of the plurality of data is marked as dirty; determining a se... | 06/21/2011 |
| 7966382 | Enabling access to media content in media servers in remote networks Provided are a method, system, and program enabling access to media content in media servers in remote networks. Available devices are discovered in a network capable of being controlled, wherein the devices include at least one media renderer and media servers. An ... | 06/21/2011 |
| 7966037 | Method and apparatus for multi-radio traffic arbitration in wireless communication protocols A method and apparatus of coordinating operation of subsystems implementing different wireless communication protocols is disclosed. The method comprises coordinating operation of a first subsystem implementing a first wireless communication protocol and at least ot... | 06/21/2011 |
| 7965979 | Methods and apparatus for providing an extended-local area system based on short messaging service Embodiments of methods and apparatus for providing an extended-local area system based on short messaging service are generally described herein. Other embodiments may be described and claimed. ... | 06/21/2011 |
| 7965770 | Shared logic for decoding and deinterlacing of compressed video One embodiment includes a method that includes receiving a compressed video stream. The method also includes decoding a number of blocks of the compressed video stream to output a number of blocks of decoded video data. The decoding is based on at least one motion c... | 06/21/2011 |
| 7965767 | Two-dimensional filtering architecture A first filtering module filters actual pixel values in a first direction (e.g., vertically), and a second filtering module filters interpolated pixel values received from the first filtering module in a second direction (e.g., horizontally). Also, a third filtering... | 06/21/2011 |
| 7965763 | Determining a bit error rate (BER) using interpolation and superposition In one embodiment, the present invention includes a method for receiving a jitter profile and a step response of a channel coupled between a transmitter and a receiver and a bit pattern to be transmitted, transmitting the bit pattern along the channel from the trans... | 06/21/2011 |
| 7965741 | Method, apparatus, and system for idle state definition for power management A predetermined network packet is utilized for power reduction in either or both of a transmitter and receiver when information is not needed. Upon detection of the predetermined network packet type, various portions of the transmitter and/or receiver may be clock g... | 06/21/2011 |
