Assignee: Hynix / Semiconductor Inc.

Location: Kyoungki-do, KR
No. of patents: 113

Number	Title	Issue Date
7463053	Semiconductor memory device for internally controlling strength of output driver Provided is a semiconductor memory device that is capable of internally controlling a strength of an output driver. The semiconductor memory device includes: an OCD (off chip driver) control signal generator for decoding EMRS and addresses to generate a plurality of...	12/09/2008
7457185	Semiconductor memory device with advanced refresh control A semiconductor memory device having a plurality of banks performs a refresh operation in sequence to each bank whether the refresh operation is required for all or less than all of the banks. The semiconductor memory device includes an extended mode register set co...	11/25/2008
7450466	Data input device of semiconductor memory device A data input device of a semiconductor memory device can reduce unnecessary current consumption occurring according to a setting of a bandwidth. The data input device includes: a bandwidth signal input part for receiving a bandwidth signal for setting a data bandwid...	11/11/2008
7450455	Semiconductor memory device and driving method thereof A semiconductor memory device prevents deterioration of refresh operation caused by sensing noise and a driving method thereof. First pull-down and second pull-down voltages which are different from each other are as a pull-down voltage of a bit line sense amplifier...	11/11/2008
7450448	Semiconductor memory device The present invention provides a semiconductor memory device adjusting a bit line over driving period according to a power supply voltage level. A semiconductor memory device for stabilizing a bit line sense amplifier (hereinafter, referred as BLSA) includes the BLS...	11/11/2008
7450440	Circuit for initializing a pipe latch unit in a semiconductor memory device A semiconductor memory device includes a pipe latch unit having a plurality of pipe latches for latching data. An input controller controls input timing of data transmitted from data line to the pipe latch unit. An output controller controls output timing of data la...	11/11/2008
7449965	Self refresh oscillator and oscillation signal generation method of the same A self refresh period signal generator includes: a voltage detection unit for detecting a voltage level of a power supply voltage in order to generate a plurality of period control signals according to the detected voltage level; and an oscillation unit for generati...	11/11/2008
7449944	Internal voltage generator An internal voltage generator includes a high efficient charge pump. The internal voltage generator includes an oscillation signal generator for receiving a reference voltage and a pumping voltage to thereby output an oscillation signal, a pump control logic for out...	11/11/2008
7449930	Delay locked loop circuit A delay locked loop (DLL) circuit for a synchronous dynamic random access memory (SDRAM) is provided. If a locking state is broken due to an external change such as a change of tCK or power supply voltage, indicating that a delay of a delay replication modeling unit...	11/11/2008
7449927	Delay locked loop circuit A delay locked loop increases an operation margin of a delay locked loop by using an output clock having more advanced phase than a DLL output clock. A clock delay compensation block receives an external clock signal to thereby generate a first multi clock and a sec...	11/11/2008
7447108	Output controller for controlling data output of a synchronous semiconductor memory device An output controller includes: an output enable signal generator for generating corresponding ones among a plurality of output enable signals based on a preset column address strobe (CAS) latency, each of the output enable signals having information relating to a de...	11/04/2008
7447100	Over-driving circuit for semiconductor memory device An over-driving circuit for a semiconductor memory device is capable of rapidly securing a sensing operation of a bit line sense amplifier regardless of a level change of a power supply voltage. Timings are adjusted for supplying an over-driving voltage and for disc...	11/04/2008
7447090	Semiconductor memory device A semiconductor memory device includes: a first bit line sense amplifier array for amplifying a data input to a first bit line pair coupled to cells; a second bit line sense amplifier array for amplifying a data input to a second bit line pair coupled to the cells; ...	11/04/2008
7447089	Bitline precharge voltage generator A bitline precharge voltage generator can generate multiple bitline precharge voltages when bitlines are precharged, thereby providing a stable operation regardless of a core voltage used as a high data voltage of a memory cell. In the bitline precharge voltage gene...	11/04/2008
7446579	Semiconductor memory device having delay locked loop A semiconductor memory device has a delay locked loop (DLL) with low power consumption. The semiconductor memory device includes a DLL for receiving an external clock to generate a DLL clock, an idle detector for detecting an idle state in which a command for drivin...	11/04/2008
7443752	Semiconductor memory device amplifying data A semiconductor memory device includes an I/O line, a first sense amplifier connected to the first I/O line to amplify a signal applied on the first I/O line in response to a first control signal, a second sense amplifier for amplifying an output signal of the first...	10/28/2008
7440345	Data output circuit of semiconductor memory device and operation method thereof A data output circuit of a semiconductor memory device and an operation method thereof, in which global I/O lines are selectively used according to a selected output data width. The data output circuit includes an I/O sense amplifier unit that selectively senses and...	10/21/2008
7440343	Output driving device An output driving device includes a pull-up driver for pull-up driving an output node in response to a pull-up control signal; a pull-down driver for pull-down driving the output node in response to a pull-down control signal; and a first n-type metal oxide semicond...	10/21/2008
7439774	Multiplexing circuit for decreasing output delay time of output signal Disclosed herein is a multiplexing circuit for decreasing the output delay time of an output signal. The multiplexing circuit includes multiplexing units and a multiplexing output unit. Each multiplexing unit is initialized in response to an initialization signal, a...	10/21/2008
7436226	Power-up detection circuit that operates stably regardless of variations in process, voltage, and temperature, and semiconductor device thereof A power-up detection circuit which operates in a stable way regardless of variation in PVT. The power-up detection circuit includes a bias circuit that generates a bias voltage in response to an external voltage, and a detection circuit that generates a detection si...	10/14/2008
7432151	Semiconductor device and method for fabricating the same A method for fabricating a semiconductor device that forms a capacitor and metal interconnection in the same level, simultaneously using a damascene process for forming a metal interconnection. A capacitor structure having the high capacitance needed for logic eleme...	10/07/2008
7430143	Delay locked operation in semiconductor memory device A semiconductor memory device has a control circuit capable of properly controlling a delay locked loop in a variety of operational modes. The semiconductor memory device includes a clock buffer for externally receiving a system clock to output it as an internal clo...	09/30/2008
7429883	Oscillator configured to complete an output pulse after inactivation An oscillator includes an oscillating block for generating a control signal in response to an enable signal, wherein the control signal is periodically toggled and a feedback block for receiving the control signal to generate the enable signal in response to an osci...	09/30/2008
7429871	Device for controlling on die termination An on die termination (ODT) control device includes a mode register set for generating a clock control signal based on mode set information; a clock control unit for receiving an internal clock signal and a delay locked loop (DLL) clock signal and outputting an inte...	09/30/2008
7428168	Semiconductor memory device sharing a data line sense amplifier and a write driver in order to reduce a chip size A semiconductor memory device includes a first and a second bank, a global data line, a first and a second data line, a data transmitter, and a switch. The global data line is configured between the first and the second banks and commonly shared by the first and the...	09/23/2008
7427875	Flip-flop circuit Signal delivery delay margin of a bypass flip-flop circuit is stabilized during high-frequency operation. An input controller for logically operating a bypass signal and a clock produces first and second output signals having different states depending on whether or...	09/23/2008
7425840	Semiconductor device with multipurpose pad It is provided a semiconductor device with an ability to receive various test signals and check test results in spite of a limited number of pads. The semiconductor device includes a signal transferring unit for transferring a power signal input through a multipurpo...	09/16/2008
7423911	Bit line control circuit for semiconductor memory device A semiconductor memory device includes a bit line sense amplifier for sensing and amplifying data applied on a bit line; a first driver for driving a pull-up voltage line of the bit line sense amplifier to a voltage applied on a normal driving voltage terminal; an o...	09/09/2008
7420407	Device for controlling internal voltage A device controls internal voltage. Increased reliability of a semiconductor memory device is obtained by increasing or decreasing a level of internal reference voltage according to change of the device. Fuse ROMs generate fuse signals having different levels accord...	09/02/2008
7420358	Internal voltage generating apparatus adaptive to temperature change An internal voltage generating apparatus adaptive to a temperature change includes a reference voltage circuit including a complementary to absolute temperature (CTAT) type transistor and a proportional to absolute temperature (PTAT) type transistor for generating a...	09/02/2008
7418612	Semiconductor device with a power down mode The semiconductor device with the power down mode includes a power down detecting block for generating a power down mode signal by detecting if the power down mode is activated, a power source control block for producing a power control signal whose ratio of an enab...	08/26/2008
7417903	Core voltage generator and method for generating core voltage in semiconductor memory device Provided are a core voltage generator and a method for generating a core voltage in a semiconductor memory device. The core voltage generator includes a first discharge driver for discharging a core voltage terminal for an interval at which the voltage is higher tha...	08/26/2008
7417494	Internal voltage generator An internal voltage generator supplies a stable internal voltage without increasing standby current. The internal voltage generator includes an internal voltage driver for supplying an internal voltage based on a control signal, a feedback circuit for supplying a fe...	08/26/2008
7417910	Low voltage semiconductor memory device A semiconductor memory device having a cell array area for reading or storing data, including: a normal cell block including a plurality of normal cells, each being coupled to one of a bit line and a bit line bar for storing a data; a reference cell block including ...	08/26/2008
7414898	Semiconductor memory device with internal power supply Provided is a semiconductor memory device including an internal power supply with low current consumption, which includes: an active interval security block for generating active interval security signals with operation intervals by a row active signal and a column ...	08/19/2008
7411842	Data arrangement control signal generator for use in semiconductor memory device A data arrangement control signal generation circuit for use in a semiconductor memory device includes a plurality of data arrangement control signal generation units connected in series, each for selectively generating a data arrangement control signal according to...	08/12/2008
7405915	Protection circuit against electrostatic discharge in semiconductor device An electrostatic discharge protection circuit for use in a semiconductor device includes an electrostatic signal discharge unit for discharging an electrostatic signal; a first electrostatic detection voltage supplying unit for generating an electrostatic detection ...	07/29/2008
7405091	Method for testing contact open in semicoductor device The present invention is a method for testing a contact open capable of effectively testing a contact open defect in an In-line as securing a mass productivity. The method includes the steps of: performing a photolithography process for forming a contact; forming a ...	07/29/2008
7403431	Method of reading a flash memory device A method of reading a flash memory device wherein the status of a predetermined cell is read in such a way that a plurality of page buffers connected to a memory cell array through a plurality of bit lines are divided into at least two group, and the page buffers ar...	07/22/2008
7395475	Circuit and method for fuse disposing in a semiconductor memory device A fuse disposing circuit executes a same test as in a state before a fuse is cut, even in case the fuse is cut. For this, the fuse disposing circuit in accordance with the invention includes a test mode enable confirmation section for informing whether a test mode i...	07/01/2008

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Assignee: Hynix / Semiconductor Inc.