Walt Disney was no Mickey Mouse inventor. He devised a serious animation camera which he patented. With the device, his company created "Snow White".
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| Number | Title | Issue Date |
| 8183912 | Internal voltage supplying device An internal voltage supplying device. A reference voltage generator generates a first feedback voltage having a predetermined voltage ratio with respect to a core voltage. An adjusting mechanism adjusts the voltage ratio, and a voltage generator supplies a high volt... | 05/22/2012 |
| 8169843 | Wafer test trigger signal generating circuit of a semiconductor memory apparatus, and a wafer test circuit using the same A wafer test trigger signal generating circuit of a semiconductor memory apparatus includes an enable timing control unit configured to generate an enable signal by using a plurality of address signals, and a trigger signal generating unit configured to generate a t... | 05/01/2012 |
| 8139703 | Data relay apparatus and semiconductor integrated circuit having the same A data relay apparatus according to one embodiment described herein can include a phase detection unit that can detect a phase difference between a clock output from a transmitter and a clock output from a receiver, and generate a plurality of phase detection signal... | 03/20/2012 |
| 8139437 | Wordline driving circuit of semiconductor memory device Wordline driving circuit of semiconductor memory device includes a bias generator configured to generate a threshold bias voltage for accessing data, an over-driver configured to increase the threshold bias voltage at an initial stage of a data accessing operation a... | 03/20/2012 |
| 8139429 | Output enable signal generating circuit and method of semiconductor memory apparatus An output enable signal generating circuit for a semiconductor memory apparatus includes an output control unit configured to receive CAS latency information and to generate an output control signal having enable timing according to a DLL on/off mode, and an output ... | 03/20/2012 |
| 8138090 | Method for forming fine patterns in semiconductor device A method for forming fine patterns in a semiconductor device includes forming a first hard mask layer over an etch target layer, forming first etch mask patterns having negative slopes over the first hard mask layer, thereby forming a resultant structure, forming a ... | 03/20/2012 |
| 8130890 | Semiconductor memory device having data clock training circuit A data clock frequency divider circuit includes a training decoder and a frequency divider. The training decoder outputs a clock alignment training signal, which is indicative of the start of a clock alignment training, in response to a command and an address of a m... | 03/06/2012 |
| 8130012 | Buffer circuit of semiconductor integrated apparatus A buffer circuit of a semiconductor integrated apparatus includes a control block configured to output a result of comparing an input voltage level and an output voltage level as a control signal, and a buffering block configured to generate an output voltage having... | 03/06/2012 |
| 8122306 | Test circuit for supporting concurrent test mode in a semiconductor memory A test circuit is capable of simultaneously performing various test modes. The test circuit includes a concurrent test mode controller for providing a plurality of decoding signals by receiving test mode input signals while test modes are being activated, and simult... | 02/21/2012 |
| 8120416 | Semiconductor integrated circuit A semiconductor integrated circuit can include a first voltage pad, a second voltage pad, and a voltage stabilizing unit that is connected between the first voltage pad and the second voltage pad. The first voltage pad can be connected to a first internal circuit, a... | 02/21/2012 |
| 8120393 | Semiconductor memory apparatus A semiconductor memory apparatus includes a initialization signal generating unit configured to vary a voltage level of an external voltage in response to a detection signal, the external voltage enables a power-up signal, an internal voltage generating unit configu... | 02/21/2012 |
| 8115244 | Transistor of volatile memory device with gate dielectric structure capable of trapping charges The present invention relates to a transistor of a volatile memory device with gate dielectric structure capable of trapping charges and a method for fabricating the same. The transistor in a cell region of a volatile memory device includes a substrate of a first co... | 02/14/2012 |
| 8111569 | Latch structure and bit line sense amplifier structure including the same A latch structure includes a first inverter that includes a first PMOS transistor and a first NMOS transistor, and a second inverter that includes a second PMOS transistor and a second NMOS transistor, receives an output signal of the first inverter, and outputs an ... | 02/07/2012 |
| 8111058 | Circuit for generating reference voltage of semiconductor memory apparatus A reference voltage generating circuit in a semiconductor memory apparatus comprises a driving control signal generating unit configured to generate a driving control signal according to a temperature variation, wherein the driving control signal generating unit is ... | 02/07/2012 |
| 8107302 | Semiconductor integrated circuit device for controlling a sense amplifier A semiconductor IC device includes a command decoder that provides internal read and internal write command signals in response to external command signals, and a delay control unit that is connected with the command decoder and provides an internal read command del... | 01/31/2012 |
| 8105950 | Method for forming fine patterns using etching slope of hard mask layer in semiconductor device A method for forming fine patterns in a semiconductor device includes forming a first hard mask layer and a second hard mask layer over an etch target layer, forming second hard mask patterns by etching the second hard mask layer, wherein an etching profile of the s... | 01/31/2012 |
| 8099620 | Domain crossing circuit of a semiconductor memory apparatus A domain crossing circuit of a semiconductor memory apparatus, the domain crossing circuit comprising first and second count signals generated at substantially a same clock period, and representing predetermined clock differences with reference to an internal clock ... | 01/17/2012 |
| 8089820 | Semiconductor integrated circuit and method thereof A semiconductor IC device which includes a common column signal generating block and a column strobe signal generating block. The common signal generating block can provide precolumn strobe signals by using external command signals and a first group of bank addresse... | 01/03/2012 |
| 8085073 | Phase synchronization apparatus A phase synchronization apparatus includes a bias control unit configured to sequentially delay an input clock signal to generate bias control signals having multiple bits, a bias generation unit configured to generate a pull-up bias voltage having a level that corr... | 12/27/2011 |
| 8085056 | Circuit for testing internal voltage of semiconductor memory apparatus An internal voltage test circuit of a semiconductor memory apparatus includes a comparing unit for comparing a level of internal voltage with a level of external voltage to output a comparison result as an output signal during a test mode, and an output selecting un... | 12/27/2011 |
| 8084804 | Capacitor with zirconium oxide and method for fabricating the same A capacitor with zirconium oxide and a method for fabricating the same are provided. The method includes: forming a storage node; forming a multi-layered dielectric structure on the storage node, the multi-layered dielectric structure including a zirconium oxide (Zr... | 12/27/2011 |
| 8081021 | Delay locked loop A semiconductor memory device includes a delay locked loop for achieving a delay locked state by correcting a phase difference between a reference clock and an internal delayed clock and for indicating the state that a larger delay amount than a maximum delay amount... | 12/20/2011 |
| 8077531 | Semiconductor integrated circuit including column redundancy fuse block A semiconductor integrated circuit includes a semiconductor chip having an edge area and a bank area located an inner portion of the edge area, and a column redundancy fuse block disposed in the edge area. ... | 12/13/2011 |
| 8068383 | Semiconductor integrated circuit having address control circuit A semiconductor IC in which a least significant bit of an external address signal is fixed to a signal level, the semiconductor integrated circuit includes an address control circuit configured to produce a carry signal, when a test mode signal is activated, in resp... | 11/29/2011 |
| 8067968 | Locking state detector and DLL circuit having the same A locking state detector includes a phase comparing unit configured to compare a reference clock signal and a feedback clock signal to generate a first phase difference distinction signal to distinguish a first phase difference range, and a second phase difference d... | 11/29/2011 |
| 8067956 | Apparatus and method for calibrating on-die termination in semiconductor memory device An on-die termination circuit in a semiconductor memory apparatus can comprise a comparing block for comparing a reference voltage with a code voltage corresponding to a code and outputting a comparison signal, a counting block for changing the code based on the com... | 11/29/2011 |
| 8063708 | Phase locked loop and method for operating the same A phase locked loop can reduce a locking time, thereby efficiently reducing power in a locking operation. The phase locked loop includes a phase detector, a control voltage generator, a voltage controlled oscillator and a start-up driver. The phase detector detects ... | 11/22/2011 |
| 8063681 | Semiconductor integrated circuit and method of controlling the same A semiconductor integrated circuit includes a DLL controlling block configured to enable or disable an update enable signal by detecting a change in a voltage level of a phase detecting signal during a predetermined time when an operation enable signal and a thresho... | 11/22/2011 |
| 8060813 | Apparatus and method for generating error detection codes An apparatus for generating error detection codes can include an error detection code generation unit configured to generate virtual error detection codes using virtual DBI information and data, and an error detection code regeneration unit configured to generate er... | 11/15/2011 |
| 8059483 | Address receiving circuit for a semiconductor apparatus An address receiving circuit for a semiconductor apparatus includes a controller that, in response to a semiconductor apparatus initialization-related command, generates a control signal having an activation cycle corresponding to the standard of cycle time of the s... | 11/15/2011 |
| 8049199 | Phase change memory device and method for manufacturing the same A phase change memory device and a method for manufacturing the same. The method includes the steps of defining bottom electrode contact holes by removing portions of an insulation layer, to expose bottom electrodes, on a semiconductor substrate on which the bottom ... | 11/01/2011 |
| 8045647 | Low power, high speed receiver circuit for use in a semiconductor integrated circuit A receiver circuit according to the invention includes a first phase transmission unit that is synchronized with a first clock, detects input data according to a plurality of detection levels, and transmits a first output signal, a first discharging control unit tha... | 10/25/2011 |
| 8045408 | Semiconductor integrated circuit with multi test A semiconductor integrated circuit includes a multi-mode control signal generating unit configured to control an activation of a up/down mat I/O switch control signal, which controls I/O switches in a up/down mat, according to a multi-test mode signal and a read/wri... | 10/25/2011 |
| 8044647 | Voltage down converter A voltage down converter includes a voltage comparator for comparing a first reference voltage and an internal voltage to provide a first driving signal; a driving signal controller coupled with the voltage comparator, the driving signal controller configured to gen... | 10/25/2011 |
| 8044395 | Semiconductor memory apparatus for controlling pads and multi-chip package having the same A semiconductor memory apparatus includes a first pad group located along a first edge of a plurality of banks, a second pad group located along a second edge of the plurality of banks opposite the first pad group, and a pad control section configured to provide fir... | 10/25/2011 |
| 8037372 | Apparatus and method for testing setup/hold time An apparatus for testing setup/hold time includes a plurality of data input units, each configured to calibrate setup/hold time of input data in response to selection signals and setup/hold calibration signals, and an off-chip driver calibration unit configured to g... | 10/11/2011 |
| 8036047 | Circuit and method for generating pumping voltage in semiconductor memory apparatus and semiconductor memory apparatus using the same A circuit for generating a pumping voltage in a semiconductor memory apparatus includes a control signal generation block configured to generate a first control signal obtained by level-shifting a voltage level of a test signal to a first driving voltage level, a vo... | 10/11/2011 |
| 8031553 | Data strobe signal generating device and a semiconductor memory apparatus using the same A data strobe signal generating device includes a preamble controller configured to generate a preamble signal enabled in synchronization with a first clock signal and disabled in synchronization with a second clock signal after an output enable signal is enabled, a... | 10/04/2011 |
| 8031552 | Multi-port memory device with serial input/output interface A multi-port memory device includes ports, banks, a global data bus, an input/output (I/O) controller, mode register set (MRS), a clock generator, and a test I/O controller. The I/O controller transmits a test signal to the global data bus in response to a mode regi... | 10/04/2011 |
| 8031548 | Voltage stabilization circuit and semiconductor memory apparatus using the same A voltage stabilization circuit includes a control signal generating unit to generate a control signal that is enabled when a supply voltage is unstable and a voltage level maintaining unit for selectively controlling total capacitance of a plurality of capacitors t... | 10/04/2011 |