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| Number | Title | Issue Date |
| 7982252 | Dual-gate non-volatile ferroelectric memory A dual-gate non-volatile memory cell includes a first dielectric layer extending over a first gate, a semiconductor region extending over the first dielectric layer, a second dielectric layer comprising tunnel oxide extending over the semiconductor region, a ferroel... | 07/19/2011 |
| 7477081 | Pre-driver circuit and data output circuit using the same Provided is a pre-driver circuit having a pull-up unit for receiving a data signal, as an input, to output a logical High; a pull-down unit for receiving the data signal, as an input, to output a logical Low; and a control unit for using a control signal reflecting ... | 01/13/2009 |
| 7443738 | Data transfer apparatus in semiconductor memory device and method of controlling the same Provided is directed to a circuit for controlling data and a data strobe driver in a semiconductor memory device, including: a first delay unit for outputting a data signal with a variable delay; a DQ driver for outputting a data signal according to the data signal ... | 10/28/2008 |
| 7432043 | Photo mask and method of manufacturing the same, and method of forming photosensitive film pattern of using the photo mask The present invention relates to a photo mask and a method of manufacturing the same, and a method of forming a photosensitive film pattern using the photo mask. A photo mask pattern having an exposure region, a phase-inverse region and a photosensitive region is pr... | 10/07/2008 |
| 7374868 | Composition for an organic bottom anti-reflective coating and method for forming pattern using the same Disclosed are a composition for an organic bottom anti-reflective coating able to improve the uniformity of a photoresist pattern with respect to an ultra-fine pattern formation process among processes for manufacturing semiconductor device, which prevents scattered... | 05/20/2008 |
| 7365430 | Semiconductor device and method of manufacturing the same Disclosed herein is a semiconductor device and method of manufacturing the same. A step between a memory cell formed in a cell region and a transistor formed in a peripheral circuit region is minimized, and the height of a gate in the memory cell is minimized. Accor... | 04/29/2008 |
| 7362631 | Semiconductor memory device capable of controlling drivability of overdriver A semiconductor memory device capable of controlling a drivability of an overdriver is provided. The semiconductor memory device includes: a first power supply for supplying a normal driving voltage; a memory cell array block; a bit line sense amplifier block for se... | 04/22/2008 |
| 7352644 | Semiconductor memory with reset function A synchronous dynamic random access memory (SDRAM) integrated circuit (IC) configured to receive an external Reset signal for resetting the IC includes an input buffer configured to generate a buffered reset signal RST from the external Reset signal. The SDRAM IC fu... | 04/01/2008 |
| 7338742 | Photoresist polymer and photoresist composition containing the same The present invention relates to photoresist polymers and photoresist compositions. The disclosed photoresist polymers and photoresist compositions containing the same have excellent transmittance, etching resistance, thermal resistance and adhesive property, low li... | 03/04/2008 |
| 7314853 | Cleaning solution for photoresist and method for forming pattern using the same Disclosed herein are photoresist cleaning solutions useful for cleaning a semiconductor substrate in the last step of a developing step when photoresist patterns are formed. Also disclosed herein are methods for forming photoresist patterns using the solutions. The ... | 01/01/2008 |
| 7312966 | Electrostatic discharge protection circuit Disclosed is an ESD protection circuit for use in a semiconductor memory device with enhanced ESD efficiency. The ESD protection circuit includes: an input pad for receiving a data; a data input buffer for transmitting the data inputted from the input pad to an inte... | 12/25/2007 |
| 7301848 | Apparatus and method for supplying power in semiconductor device Provided is directed to an apparatus and method of supplying power in a semiconductor memory device which supplies an external voltage of high level at the beginning operation which current consumption is rapidly increased and then supplies an internal voltage of a ... | 11/27/2007 |
| 7301375 | Off-chip driver circuit and data output circuit using the same An off-chip driver circuit including a plurality of delay circuits, at least two of which have different delay times, in which the delay circuits receive a data signal and generate delayed data signals, respectively. The circuit also includes a plurality of off-chip... | 11/27/2007 |
| 7285370 | Light absorbent agent polymer useful for organic anti-reflective coating, its preparation method and organic anti-reflective coating composition comprising the same Disclosed are a light absorbent agent polymer for organic anti-reflective coating which can prevent diffused light reflection of bottom film layer or substrate and reduce standing waves caused by a variation of thickness of the photoresist itself, thereby, increasin... | 10/23/2007 |
| 7282318 | Photoresist composition for EUV and method for forming photoresist pattern using the same The present invention relates to photoresist compositions for EUV and methods for forming photoresist patterns. More specifically, fine photoresist patterns: of less than 50 nm without collapse are formed with EUV (Extreme Ultraviolet) as an exposure light source by... | 10/16/2007 |
| 7280402 | Method for reading flash memory cell, NAND-type flash memory apparatus, and NOR-type flash memory apparatus A method of reading a flash memory cell, a NAND-type flash memory apparatus, and/or a NOR-type flash memory apparatus improves the resolution capability and reduces the determination time by using different voltages applied at the read operation of the flash device.... | 10/09/2007 |
| 7279394 | Method for forming wall oxide layer and isolation layer in flash memory device Disclosed herein are methods for forming wall oxide films in flash memory devices and methods for forming isolation films. After trenches are formed in the substrate, an ISSG (In-Situ Steam Generation) oxidization process is performed to form wall oxide films on sid... | 10/09/2007 |
| 7271439 | Semiconductor device having pad structure for preventing and buffering stress of silicon nitride film The present invention discloses a semiconductor device having a pad structure for preventing a stress of a silicon nitride film. The semiconductor device includes a semiconductor substrate, a lower structure formed on the semiconductor substrate, a first insulation ... | 09/18/2007 |
| 7271088 | Slurry composition with high planarity and CMP process of dielectric film using the same Disclosed herein are a CMP slurry composition with high-planarity and a CMP process for polishing a dielectric film using the same. More specifically, a CMP slurry composition with high-planarity includes a carbon compound having tens of thousands of carboxyl groups... | 09/18/2007 |
| 7271066 | Semiconductor device and a method of manufacturing the same Disclosed are a semiconductor devices and method of fabricating the same. Anti-etch films are formed in the top corners of the device isolation film using a material that has a different etch selectivity ratio from nitride or oxide and is not etched in an oxide gate... | 09/18/2007 |
| 7270937 | Over-coating composition for photoresist and process for forming photoresist pattern using the same Overcoating compositions for a photoresist and methods of using the same are disclosed. More specifically, overcoating compositions for a photoresist comprising materials which can weaken acid stably are disclosed. These materials neutralize large amounts of acid pr... | 09/18/2007 |
| 7270933 | Organic anti-reflective coating composition and method for forming photoresist pattern using the same An organic anti-reflective coating composition and a method for forming a photoresist pattern using the same in order to improve uniformity of the pattern in an ultra-fine pattern formation process of the photoresist. In one aspect, organic anti-reflective coating c... | 09/18/2007 |
| 7269064 | Method of controlling page buffer having dual register and circuit thereof Disclosed are a method of controlling a page buffer having a dual register and a control circuit thereof. In the present invention, during a normal program operation, a normal program operation is performed through the same transmission path as a data transmission p... | 09/11/2007 |
| 7268064 | Method of forming polysilicon layer in semiconductor device Disclosed herein is a method of forming a polysilicon film of a semiconductor device. Upon deposition process of a polysilicon film, the inflow of a gas is reduced to 150 sccm to 250 sccm to control abnormal deposition depending upon excessive inflow of the gas. Acc... | 09/11/2007 |
| 7262995 | Method for reading flash memory cell, NAND-type flash memory apparatus, and NOR-type flash memory apparatus A method of reading a flash memory cell, a NAND-type flash memory apparatus, and/or a NOR-type flash memory apparatus improves the resolution capability and reduces the determination time by using different voltages applied at the read operation of the flash device.... | 08/28/2007 |
| 7259078 | Method for forming isolation layer in semiconductor memory device Disclosed herein is a method for forming an isolation film of a semiconductor memory device. According to the disclosure, in a pre-treatment cleaning process performed before a tunnel oxide film is formed, a SC-1 cleaning process is performed at a temperature rangin... | 08/21/2007 |
| 7259067 | Method for manufacturing flash memory device The present invention relates to a method for manufacturing a flash memory device. A plurality of conductive layers and dielectric layers are etched in a single etch apparatus, thus forming a control gate and a floating gate. In a gate formation process in which a t... | 08/21/2007 |
| 7259063 | Method for forming a gate electrode in a non volatile memory device Disclosed herein is a method for forming a gate electrode of a non-volatile memory device. In an etch process of a gate electrode for defining the gate electrode, the etch process is performed by selectively adding an addition gas containing carbon. This prevents un... | 08/21/2007 |
| 7257726 | Circuit for generating wait signal in semiconductor device The present invention discloses a circuit for generating a wait signal in a semiconductor device. Even if an address input enable signal is synchronized with a clock and continuously or irregularly inputted, the circuit for generating the wait signal in the semicond... | 08/14/2007 |
| 7250809 | Boosted voltage generator The present invention provides a boosted voltage generator of a semiconductor device where a boosted voltage efficiency and drivability at a target boosted voltage level can be evaluated accurately by employing an enable signal generator. The boosted voltage generat... | 07/31/2007 |
| 7242075 | Silicon wafers and method of fabricating the same By using a two-step RTP (rapid thermal processing) process, the wafer is provided which has an ideal semiconductor device region secured by controlling fine oxygen precipitates and OiSFs (Oxidation Induced Stacking Fault) located on the surface region of the wafer. ... | 07/10/2007 |
| 7236397 | Redundancy circuit for NAND flash memory device A redundancy circuit for a NAND flash memory device reduces a test time and production time of the device, by performing a redundancy operation through a repair select unit using a cam cell. In addition, the redundancy circuit employs a repair method using a redunda... | 06/26/2007 |
| 7235458 | Method of forming an element isolation film of a semiconductor device Disclosed herein is a method of forming an element isolation film of a semiconductor device. An aluminum oxide film of a high wet etch rate is used as a pad oxide film, a trench is formed, and top and bottom edges of the trench is made rounded while removing some of... | 06/26/2007 |
| 7224194 | Output driver circuit The present invention relates to an output driver circuit which exhibits a reduced variation in the slew rate of an output signal thereof, irrespective of a variation in temperature occurring during a process carried out by a semiconductor memory device, to which th... | 05/29/2007 |
| 7221573 | Voltage up converter The present invention discloses a voltage up converter, including: a detector for detecting a level of an internal power to generate the internal power higher than an external power; an asymmetrical oscillator for generating a frequency in which a high level width a... | 05/22/2007 |
| 7212439 | NAND flash memory device and method of programming the same Provided is directed to a NAND flash memory device and a method of programming the same, which can improve integration of the device by removing a common source line connecting with a source line coupled to a plurality of cell blocks, control a voltage applied to a ... | 05/01/2007 |
| 7211524 | Method of forming insulating layer in semiconductor device The present invention relates to a method of forming an insulating film in a semiconductor device. After a mixed gas of alkyl silane gas and N2O gas is supplied into the deposition equipment, a radio frequency power including a short pulse wave for causin... | 05/01/2007 |
| 7211488 | Method of forming inter-dielectric layer in semiconductor device The present invention relates to a method of forming an interlayer dielectric film in a semiconductor device. More particularly, the present invention selectively forms an insulating film spacer only at a region where a plug is formed between metal lines and removes... | 05/01/2007 |
| 7211484 | Method of manufacturing flash memory device Disclosed is a method of manufacturing a flash memory device. In a flash memory device using a SA-STI scheme, a trench for isolation is buried with oxide. A field oxide film is then formed by means of a polishing process. Next, field oxide films of a cell region and... | 05/01/2007 |
| 7208973 | On die termination circuit The present invention discloses an on die termination circuit. The on die termination circuit used in a DDR2 employs transmission gates as pull-up and pull-down switches, equalizes pull-up and pull-down resistance values by changing connection relations between swit... | 04/24/2007 |