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| Number | Title | Issue Date |
| 8184500 | Semiconductor memory device and method for operating the same A semiconductor memory device includes a plurality of banks, a first bank selection driving control signal generation unit configured to generate a plurality of first bank selection driving control signals corresponding to the plurality of banks in response to an ac... | 05/22/2012 |
| 8184499 | Semiconductor memory apparatus A semiconductor memory apparatus is provided. The semiconductor memory apparatus comprises: first and second memory banks located a predetermined distance from each other in a first direction; a common column selection control unit located at an outside region in th... | 05/22/2012 |
| 8184496 | Semiconductor device and method for operating the same A semiconductor device includes a sensing unit configured to sense whether a value of a programming sensing node is within a predefined range, a fuse connected to the programming sensing node, a programming voltage supplying unit configured to supply a programming v... | 05/22/2012 |
| 8184483 | Nonvolatile memory device and method of programming the same A nonvolatile memory device includes a memory cell array, including a first memory cell group configured to store data and a second memory cell group configured to store operation information, including first and second program start voltages, a page buffer unit, in... | 05/22/2012 |
| 8184482 | Nonvolatile memory device for preventing a source line bouncing phenomenon A nonvolatile memory device includes a memory cell array configured to include cell strings coupled between respective bit lines and a source line, a unilateral element coupled to the source line, and a negative voltage generation unit coupled to the unilateral elem... | 05/22/2012 |
| 8179737 | Semiconductor memory apparatus A semiconductor memory apparatus includes an internal circuit configured to be driven by current flowing between first and second voltage nodes, and a current control unit configured to control an amount of the current in response to an operational-speed information... | 05/15/2012 |
| 8179722 | Page buffer circuit and nonvolatile memory device A page buffer circuit comprises a sense amplification unit configured to compare a reference voltage and a bit line voltage of a bit line of a selected memory block and to increase a voltage level of a sense node by a difference between the reference voltage and the... | 05/15/2012 |
| 8179179 | Semiconductor device A semiconductor device includes a reset signal generator configured to change the number of activated signals among a plurality of reset signals according to a frequency of an external clock, a plurality of mixing control signal generators configured to generate a p... | 05/15/2012 |
| 8174916 | Bit line precharge circuit and a semiconductor memory apparatus using the same A bit line precharge circuit includes a precharge signal generation unit configured to generate first and second precharge signals that are enabled at different timing points by receiving a bit line equalizing signal; a first precharge unit configured to connect a p... | 05/08/2012 |
| 8174903 | Method of operating nonvolatile memory device A method of operating a nonvolatile memory device, including a memory cell array, which further includes a drain select transistor, a memory cell string, and a source select transistor coupled between a bit line and a source line, where the method includes prechargi... | 05/08/2012 |
| 8174896 | Nonvolatile memory device and method of operating the same A nonvolatile memory device comprises a page buffer unit, a counter, a program pulse application number storage unit, and a program start voltage setting unit. The page buffer is configured to output a 1-bit pass signal when a cell programmed to exceed a reference v... | 05/08/2012 |
| 8174894 | Program method of flash memory device A program method of a flash memory device includes inputting a first data and a second data to a page buffer coupled to memory cells including an even page and an odd page, pre-programming a first memory cell of the odd page using the first data, programming a secon... | 05/08/2012 |
| 8174876 | Fusion memory device embodied with phase change memory devices having different resistance distributions and data processing system using the same A fusion memory device having phase change memory devices that have different resistance distributions and a corresponding data processing system is presented. The fusion memory device includes a first and a second phase change memory group arranged on the same chip... | 05/08/2012 |
| 8174862 | Fuse circuit and redundancy circuit A fuse circuit or a redundancy circuit is capable of detecting a fuse with a crack. The fuse circuit includes a fuse block configured to drive an output node through a current path including a fuse in response to a fuse enable signal, and a voltage detection block c... | 05/08/2012 |
| 8173497 | Semiconductor device preventing floating body effect in a peripheral region thereof and method for manufacturing the same A semiconductor device having a cell region and a peripheral region includes an silicon on insulator (SOI) substrate having a stack structure of a silicon substrate, a buried insulation layer, and a silicon layer. An epi-silicon layer is formed in the buried insulat... | 05/08/2012 |
| 8171358 | Semiconductor device and method for driving the same A semiconductor device and a method for driving the same rapidly detect failure of a through-semiconductor-chip via and effectively repairing the failure using a latching unit assigned to each through-semiconductor-chip via. The semiconductor device includes a plura... | 05/01/2012 |
| 8171189 | Semiconductor apparatus A semiconductor apparatus includes a clock input buffer, an asynchronous data input buffer, and a synchronous data input buffer. The clock input buffer is configured to buffer an external clocks in order to generate an internal clock. The asynchronous data input buf... | 05/01/2012 |
| 8169847 | Semiconductor memory apparatus and refresh control method of the same A semiconductor memory apparatus and refresh control method are presented. The semiconductor memory apparatus includes a memory cell block composed of a multiplicity of floating body cell (FBC) transistors. Each FBC transistor has a gate connected to a word line, a ... | 05/01/2012 |
| 8169846 | Refresh control circuit and method for semiconductor memory apparatus A refresh control circuit of a semiconductor memory apparatus includes: a variable oscillator configured to generate a room-temperature oscillation signal and a limit-temperature oscillation signal in response to a temperature state signal; a cycle selector configur... | 05/01/2012 |
| 8169842 | Skew detector and semiconductor memory device using the same A skew detection circuit includes a data sensing block configured to sense a first data that is transferred earliest and a last data that is transferred latest among a plurality of data which are transferred through different transfer paths, and generate a sensing r... | 05/01/2012 |
| 8169837 | Semiconductor memory device and method for generating bit line equalizing signal A bit line equalizing signal generator of a semiconductor memory device uses a supply voltage and a pumping voltage in stages during a period where a bit line equalizing signal is enabled, thereby enhancing an equalizing speed and an active speed while minimizing po... | 05/01/2012 |
| 8169836 | Buffer control signal generation circuit and semiconductor device A buffer control signal generation circuit includes a burst start signal generator, a command decoder, a burst controller, and a burst column controller. The burst start signal generator shifts a write pulse into a first period to generate a first burst start signal... | 05/01/2012 |
| 8169827 | NAND flash memory string apparatus and methods of operation thereof A NAND string, its operation, and manufacture is described herein. The NAND string includes one or more memory cells, a first selection transistor coupled to the memory cells, and a second selection transistor coupled between the memory cell and the first selection ... | 05/01/2012 |
| 8169258 | Semiconductor integrated circuit A semiconductor integrated circuit includes a reference voltage generating block, a circuit block, and a transmission line. The reference voltage generating block generates a first reference voltage and generates and outputs a digital code corresponding to the level... | 05/01/2012 |
| 8169254 | Semiconductor apparatus and method for controlling the same A semiconductor apparatus includes a plurality of pump control units respectively located in a plurality of chips, connected in series through a first TSV, and configured to sequentially delay a period signal, transmit delayed period signals and generate pump contro... | 05/01/2012 |
| 8169232 | Apparatus and method for generating resistance calibration code in semiconductor integrated circuit A resistance calibration code generating apparatus includes a code calibration unit configured to calibrate and output code values of a resistance calibration code during predetermined cycles of a calibration clock, which are determined by a code calibration time co... | 05/01/2012 |
| 8169020 | Semiconductor device with buried bit lines and method for fabricating the same A semiconductor device includes a substrate having trenches, buried bit lines formed in the substrate, and including a metal silicide layer and a metallic layer, wherein the metal silicide layer contacts sidewalls of the trenches and the metallic layer is formed ove... | 05/01/2012 |
| 8168450 | Semiconductor package, stacked semiconductor package having the same, and a method for selecting one semiconductor chip in a stacked semiconductor package A semiconductor package includes a semiconductor chip having a circuit section. A first chip selection electrode passes through a first position of the semiconductor chip, and the first chip selection electrode has a first resistance and outputs a first signal. A se... | 05/01/2012 |
| 8164963 | Semiconductor memory device A semiconductor memory device includes: a first strobe signal generation unit configured to generate a first rising strobe signal in response to a rising DLL clock signal; a second strobe signal generation unit configured to generate a second rising strobe signal in... | 04/24/2012 |
| 8164941 | Semiconductor memory device with ferroelectric device and refresh method thereof A semiconductor memory device with a ferroelectric device comprises a channel region, a drain region and a source region formed in a substrate, a ferroelectric layer formed over the channel region, and a word line formed over the ferroelectric layer. A different cha... | 04/24/2012 |
| 8164200 | Stack semiconductor package and method for manufacturing the same A stack semiconductor package includes a first insulation member having engagement projections and a second insulation member formed having engagement grooves into which the engagement projections are to be engaged. First conductive members are disposed in the first... | 04/24/2012 |
| 8163617 | Vertical channel type non-volatile memory device and method for fabricating the same A method for fabricating a vertical channel type non-volatile memory device including forming a source region, alternately forming a plurality of interlayer dielectric layers and a plurality of conductive layers for a gate electrode over a substrate with the source ... | 04/24/2012 |
| 8159898 | Architecture of highly integrated semiconductor memory device A semiconductor memory device includes: a first row control circuit region corresponding to a first memory bank; a first column control circuit region corresponding to the first memory bank; a second row control circuit region corresponding to a second memory bank a... | 04/17/2012 |
| 8159892 | Nonvolatile memory device and method of testing the same A nonvolatile memory device includes a storage unit configured to store pattern data selected based on a test command set, and a control unit configured to consecutively perform a program operation on a number of pages in response to the pattern data to obtain progr... | 04/17/2012 |
| 8159891 | Sensing characteristic evaluating apparatus for semiconductor device and method thereof A sensing characteristic evaluating apparatus for a semiconductor device includes a test current supply unit configured to supply a test current to an input/output line during a test mode for evaluating a sensing characteristic, and a sensing amplifying circuit conf... | 04/17/2012 |
| 8159871 | Magnetoresistive memory cell using floating body effect, memory device having the same, and method of operating the memory device A magnetoresistive memory cell includes an MTJ device and a select transistor. The select transistor includes a first conduction-type semiconductor layer, a gate electrode formed by disposing a gate insulating layer on top of the semiconductor layer, and first and s... | 04/17/2012 |
| 8159869 | Circuit and method for generating reference voltage, phase change random access memory apparatus and read method using the same A circuit for generating a reference voltage includes at least one reference cell, a reference cell write driver, a reference cell sense amplifier, and a voltage compensation unit. The reference cell is a variable resistance memory cell. The reference cell write dri... | 04/17/2012 |
| 8159261 | Semiconductor circuit A semiconductor circuit includes a pad, a pad driver connected to the pad at an output terminal thereof and configured to calibrate a voltage of the pad in response to code signals, a comparison section configured to compare a reference voltage and the voltage of th... | 04/17/2012 |
| 8159069 | Metal line of semiconductor device without production of high resistance compound due to metal diffusion and method for forming the same A metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is formed on the semiconductor substrate having the lower metal line, and a metal line forming region exposing at least a portion of the lower metal line is defined in ... | 04/17/2012 |
| 8159066 | Semiconductor package having a heat dissipation member A semiconductor package having a heat dissipation member capable of efficiently conveying excess heat away from semiconductor chips is presented. The semiconductor package includes a semiconductor chip, through-electrodes, and a heat dissipation member. The semicond... | 04/17/2012 |
