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A portable partition for use in an automobile having a seat with a seat bench and a seat backrest.
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| Number | Title | Issue Date |
| 4835767 | Additive PCM speaker circuit for a time shared conference arrangement A time shared multiport conference arrangement includes an additive PCM speaker circuit. The additive PCM speaker circuit eliminates the need for loudest speaker detection and the last speaker memory of conventional conferencing arrangements. The additive... | 05/30/1989 |
| 4821149 | Substrate mounting device A substrate mounting device for installing an electrical substrate to a carrier substrate. The substrate mounting device includes a plurality of tabs extending from the perimeter edges of the electrical substrate. First and second substrate guides are mou... | 04/11/1989 |
| 4812947 | Device for discharging electrostatic potentials A device for conducting electrostatic potentials to a protection ground is disclosed. The device includes an electrically conductive center section mounted on a substrate mounting device, with the center section electrically connected to the protection gr... | 03/14/1989 |
| 4809286 | Laser driver circuit A laser driver circuit is disclosed for operating an electrical current driven light emitting device or laser. The laser driver circuit is driven from external equipment by a modulated electrical signal and includes a laser biasing network arranged to pro... | 02/28/1989 |
| 4802161 | Packet bus interface The Arbitrated Bus Interface (ABI) is a set of custom LSI circuits which sends and receives minipackets of binary information to and from a data bus. The ABI performs arbitration, address recognition, and buffering required for transmitting and receiving ... | 01/31/1989 |
| 4796356 | Process for making close tolerance thick film resistors A process for manufacturing close tolerance thick film resistors on a ceramic dielectric substrate is disclosed. The process includes the steps of printing resistor terminations to the dielectric substrate using a precious conductor material and fixing th... | 01/10/1989 |
| 4797784 | Substrate mounting device A substrate mounting device for installing an electrical substrate to a carrier substrate. The substrate mounting device includes a plurality of guide rails mounted on the perimeter edge of the electrical substrate. First and second substrate guides are m... | 01/10/1989 |
| 4797786 | Substrate mounting device A substrate mounting device for installing an electrical substrate to a carrier substrate. The substrate mounting device includes a plurality of guide rails mounted on the perimeter edge of the electrical substrate. First and second substrate guides are m... | 01/10/1989 |
| 4797654 | Data format conversion circuit This circuit converts data in an ISDN data format to data in a T-carrier compatible data format and vice versa. The converted data is then stored in a memory for subsequent transmission. Due to the format differences, the data may be discontinuous. This c... | 01/10/1989 |
| 4796256 | (MPRT) Mini packet receiver transmitter The Mini Packet Receiver Transmitter Circuit (MPRT) provides an interface between one or two eight bit microprocessors and a digital subscriber loop interface circuit. The bi-directional communication on a single wire pair is accomplished by alternating t... | 01/03/1989 |
| 4794488 | Substrate mounting device A substrate mounting device for installing an electrical substrate to a carrier substrate. The substrate mounting device includes a plurality of tabs extending from the perimeter edges of the electrical substrate. First and second substrate guides are mou... | 12/27/1988 |
| 4794591 | Digital voice switch for a multi-port conference circuit An echo cancellation arrangement is provided for decreasing the "singing" of a connection of a large number of telephone subscribers in a conference calling arrangement. This arrangement includes a means for inserting quiet code during time when the voice... | 12/27/1988 |
| 4794589 | Asynchronous packet manage The Asynchronous Packet Manager is the interface for transferring data in a first format between a data terminal equipment and a combination data and telephone switching system in a properietary packet format. A microprocessor accepts data from a universa... | 12/27/1988 |
| 4792957 | Laser temperature controller A laser temperature controller is disclosed for controlling the temperature of a laser device. The controller includes a bridge circuit connected to a thermistor device which is mounted on the laser package. The bridge circuit generates error signals repr... | 12/20/1988 |
| 4788524 | Thick film material system A material system for manufacturing thick film resistors on a ceramic dielectric substrate is disclosed. The system includes the application and fixing of resistor terminations composed of a precious conductor material to a dielectric substrate. Resistor ... | 11/29/1988 |
| 4787029 | Level converting bus extender with subsystem selection signal decoding enabling connection to microprocessor The bus extender circuit is a least replaceable unit which interfaces between intermodule subsystems and the microprocessor controller of the system. The bus extender circuits are structured so that the subsystem modules may be placed in different power z... | 11/22/1988 |
| 4783778 | Synchronous packet manager The Synchronous Packet Manager is the interface for switching synchronous data between a data terminal equipment and a combination data and telephone switching system in a proprietary packet format. A first microprocessor controlled circuit controls data ... | 11/08/1988 |
| 4774660 | Increased bandwidth for multi-processor access of a common resource This circuitry permits equal access to a shared resource by a number of central processing units (CPUs). In a multiple CPU arrangement, common resource contention problems arise, when several CPUs attempt to access the common resource. To resolve these co... | 09/27/1988 |
| 4773037 | Increased bandwidth for multi-processor access of a common resource This circuitry permits equal access to a shared resource by a number of central processing units (CPUs). In a multiple CPU arrangement, common resource contention problems arise, when several CPUs attempt to access the common resource. To resolve these co... | 09/20/1988 |
| 4763022 | TTL-to-CMOS buffer A TTL-to-CMOS converter consists of a plurality of N-channel and P-channel MOS transistors, each of which is fabricated so as to have a predetermined channel Width-to-Length ratio (W/L). The transistors are arranged to include an input complementary pair ... | 08/09/1988 |
| 4758822 | Bidirectional amplifier A bidirectional amplifier for use in a transmission line, that utilizes a pair of interconnected bridge circuits including isolation transformers and a pair of unidirectional amplifiers. The transmission in each direction uses a single amplifier to amplif... | 07/19/1988 |
| 4757499 | Method for zero byte time slot interchange This method is a scheme for suppressing excessive amounts of logic zeros transmitted via T-carrier line facilities between switching systems or channel banks. This scheme provides proper zero bit suppression for alternating mark inversion signalling (AMI)... | 07/12/1988 |
| 4757494 | Method for generating additive combinations of PCM voice samples A method for generating additive combinations of PCM voice samples separates the samples into magnitude portions and sign portions. The magnitude portion of each PCM voice sample is converted from compressed PCM form to linear form. The magnitudes of the ... | 07/12/1988 |
| 4757193 | Laser DC bias controller A laser DC bias controller is disclosed for controlling and monitoring the laser of a fiber-optic transmitter. The arrangement comprises an optical power monitor including a light detector for converting the light output by the laser into photo current. T... | 07/12/1988 |
| 4757500 | Method for zero byte time slot interchange This method is a scheme for suppressing excessive amounts of logic zeros transmitted via T-carrier line facilities between switching systems or channel banks. This scheme provides proper zero bit suppression for alternating mark inversion signalling (AMI)... | 07/12/1988 |
| 4757501 | Method for zero byte time slot interchange This method is a scheme for suppressing excessive amounts of logic zeros transmitted via T-carrier line facilities between switching systems or channel banks. This scheme provides proper zero bit suppression for alternating mark inversion signalling (AMI)... | 07/12/1988 |
| 4755907 | Substrate connector guide A substrate connector guide for installing and electrically connecting an electrical substrate to a carrier substrate. The substrate connector guide includes a plurality of guide rails mounted on the perimeter edge of the electronical substrate and at lea... | 07/05/1988 |
| 4755906 | Substrate connector guide A substrate connector guide for installing and electrically connecting an electrical substrate to a carrier substrate. The substrate connector guide includes a plurality of guide rails mounted on the perimeter edge of the electrical substrate and at least... | 07/05/1988 |
| 4754454 | Synchronization circuitry for duplex digital span equipment This circuit facilitates the synchronization of two copies of digital control units. These digital control units control a number of digital spans. One copy of this circuit is active at any one particular time. This one copy drives all the remaining circu... | 06/28/1988 |
| 4754425 | Dynamic random access memory refresh circuit selectively adapted to different clock frequencies A dynamic RAM memory refresh circuit is used with a microprocessor. In a small telecommunication switching system, a microprocessor shares access to memory with the dynamic RAM refresh circuit. Since circuitry size is of paramount importance, this circuit... | 06/28/1988 |
| 4751696 | CENTREX attendant console interface An interface circuit for transmitting data and voice signals between a CENTREX equipped central office exchange and a remotely located attendant console. The interface circuit includes an analog interface arranged to receive analog voice signals from the ... | 06/14/1988 |
| 4747589 | Universal pneumatic parts locating system A printer table including a series of angled jets for sources of air and for sources of vacuum and also including a set of locating pins. The combination enables the use of the directed jets to move a substrate into position for processing and to hold the... | 05/31/1988 |
| 4747112 | Decoding method for T1 line format for CCITT 32K bit per second ADPCM clear channel transmission and 64 KBPS clear channel transmission The present method is a decoding scheme for suppressing excessive amount of zeroes transmitted via a T1 line facility. Clear channel transmission capability is provided by this scheme for 32 kb/s or 64 kb/s transmission channels. This scheme provides the ... | 05/24/1988 |
| 4744045 | Divider circuit for encoded PCM samples A circuit divides pulse code modulation (PCM) samples in D2 format. An exponent subtractor provides the difference of the exponents of the two numbers. A mantissa multiplier circuit determines the quotient by multiplying the mantissa of the PCM sample by ... | 05/10/1988 |
| 4744079 | Data packet multiplexer/demultiplexer A Multiplexer/Demultiplexer for transmitting packetized data between a processor and a Pulse Code Modulation (PCM) bus. First-in First-Out (FIFO) shift registers, serial-to-parallel and parallel-to-serial converters and associated timing and control circu... | 05/10/1988 |
| 4742531 | Encoding method for T1 line format for CCITT 32k bit per second ADPCM clear channel transmission The present method is an encoding scheme for suppressing excessive amount of zeroes transmitted via a T1 line facility. Clear channel transmission capability is provided by this scheme for 32 kb/s or 64 kb/s transmission channels. This scheme provides the... | 05/03/1988 |
| 4740961 | Frame checking arrangement for duplex time multiplexed reframing circuitry Telecommunication switching systems are typically connected by high-speed digital data spans. These spans may commonly be T1 or T2 carriers using DS1 or DS2 data formats, respectively. These systems may contain duplex digital span control units. Synchroni... | 04/26/1988 |
| 4740960 | Synchronization arrangement for time multiplexed data scanning circuitry Telecommunication switching systems are typically connected by high-speed digital data spans. These spans may commonly be T1 or T2 carriers using DS1 or DS2 data formats, respectively. These systems may contain duplex digital span control units. The prese... | 04/26/1988 |
| 4740914 | Address generator An address generator which provides addresses for machine storage and software retrieval of computer status information. A counter is used to generate address signals in a descending order until it is disabled by a computer during alarm conditions. Under ... | 04/26/1988 |
| 4739246 | Current reference for feedback current source A Current Reference for providing a feedback signal to a current driver in a current-series, feedback-controlled current source circuit that includes at least one, but more likely more than one, controlled current source. The Current Reference comprises a... | 04/19/1988 |
