...that after Walter Hunt patented the safety pin in 1849, he sold the rights to it for $400?
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| Number | Title | Issue Date |
| 7906840 | Semiconductor integrated circuit package, printed circuit board, semiconductor apparatus, and power supply wiring structure A semiconductor integrated circuit package, a printed circuit board, a semiconductor apparatus, and a power supply wiring structure that allow attainment of stable power source and ground wiring without causing resonance even in a high-frequency bandwidth are provid... | 03/15/2011 |
| 7872612 | Antenna apparatus utilizing aperture of transmission line An antenna apparatus utilizing an aperture of transmission line, which is connected to a first transmission line having a predetermined characteristic impedance, includes a tapered line portion, and an aperture portion. The tapered line portion is connected to one e... | 01/18/2011 |
| 7754619 | Method for forming a coating with a liquid, and method for manufacturing a semiconductor device A method of forming a liquid coating on a substrate that reduces the amount of consumption of the coating liquid and achieves a more even distribution of the thickness of the liquid coating film. The method may include supplying a solvent to a surface of a substrate... | 07/13/2010 |
| 7750478 | Semiconductor device with via hole of uneven width A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon... | 07/06/2010 |
| 7732925 | Semiconductor device and manufacturing method thereof A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon... | 06/08/2010 |
| 7729181 | Semiconductor storage device using a bitline GND sensing scheme for a reduced real estate of pre-sense amplifier A semiconductor storage device comprises of a memory cell connected to a plate line and a bit line, a potential shift circuit which is connected to a bit line, temporarily changes in output voltage corresponding to the voltage change of the bit line when a voltage i... | 06/01/2010 |
| 7701482 | Method and apparatus for processing pictures of mobile object A feature amount of an inter-mobile unit relative movement are detected as an observation amount by an observation amount detecting section 26, time series of the observation amounts are stored as an observation series into a storage section 27 to calc... | 04/20/2010 |
| 7697355 | Semiconductor memory and system with matching characteristics of signal supplied to a dummy signal line and a real signal line To fully evaluate a real signal line and a real memory cell adjacent to a dummy signal line and utilize dummy signal line as real signal line, a semiconductor memory includes at least one real signal line connected to real memory cells driven by a real driver and at... | 04/13/2010 |
| 7692294 | Semiconductor device and method for fabricating the same A semiconductor device with a structure having superior heat sink characteristics. A first heat sink member is located over a wiring board by using an adhesive material. A semiconductor element is stuck over the first heat sink member by using an adhesive material. ... | 04/06/2010 |
| 7688664 | Electrical fuse circuit, memory device and electronic part An electrical fuse circuit including: a capacitor composing an electrical fuse; a write circuit breaking an insulating film of the capacitor by applying voltage to between both terminals of the capacitor in accordance with a write signal; and a precharge circuit pre... | 03/30/2010 |
| 7688121 | Power supply voltage detection circuit A power supply voltage detection circuit is provided including: a first switch to connect between a power supply voltage terminal and a first terminal according to a power supply voltage detection signal and an external signal; a second switch to connect between a r... | 03/30/2010 |
| 7687319 | Semiconductor device and manufacturing method thereof The present invention provides a method for manufacturing a semiconductor device which includes at least supplying an adhesive for bonding an electronic component which has a plurality of bumps with a substrate which has a plurality of bonding pads corresponding to ... | 03/30/2010 |
| 7684258 | Semiconductor memory and controller with time-shared mode for row address, column address and data mask signals inputted via address terminals To perform mask control of data signals without increasing the number of external terminals even when the number of bits in a data mask signal is large, an address input circuit sequentially receives a first address signal, a second address signal, and a first data ... | 03/23/2010 |
| 7678711 | Semiconductor device, and method and apparatus for manufacturing the same A SiO2 film is formed on a semiconductor substrate. Then, a SiN film is formed on the SiO2 film. In this event bis(tertiary butyl amino) silane and NH3 are used as a material gas, and the film forming temperature is set to 600° C. o... | 03/16/2010 |
| 7676777 | Method and apparatus for supporting verification, and computer product A verification support apparatus receives description data. Upon receiving the description data, the apparatus automatically generates and outputs a verification property, a verification scenario, specification data, review information, etc. In addition, the apparat... | 03/09/2010 |
| 7673216 | Cache memory device, semiconductor integrated circuit, and cache control method A memory cache device in which a storage area used for a memory data protection function is effectively used at the time of not using the memory data protection function. A mode selection signal makes ECC code sections for storing an ECC code function as a storage a... | 03/02/2010 |
| 7672181 | Semiconductor memory, test method of semiconductor memory and system Each sub word line is coupled to a gate of a transfer transistor of a memory cell. A first switch of a sub word decoder couples the sub word line to a high level voltage line when a main word line is in an activation level. A second switch couples the sub word line ... | 03/02/2010 |
| 7671872 | Method and apparatus for determining chrominance space A method for determining which one of regions in a chrominance space an input point belongs to. The regions are defined by boundary lines. The method includes generating in the chrominance space a first line, extending through the input point and the origin of the c... | 03/02/2010 |
| 7671384 | Semiconductor integrated circuit device having improved punch-through resistance and production method thereof, semiconductor integrated circuit device including a low-voltage transistor and a high-voltage transistor An integrated circuit device comprises a memory cell well formed with a flash memory device, first and second well of opposite conductivity types for formation of high voltage transistors, and third and fourth wells of opposite conductivity types for low voltage tra... | 03/02/2010 |
| 7670759 | Micro pattern forming method and semiconductor device manufacturing method Photosensitive resist material is coated on a substrate and exposed and developed to form a resist pattern. The surface layer of sidewalls and a top wall of the resist pattern is etched by plasma of a mixture gas of a first gas and an SO2 gas, the first g... | 03/02/2010 |
| 7669154 | Timing analysis method, timing analysis program, and timing analysis tool This invention intends to provide timing analysis methods, timing analysis programs, and timing analysis tools for the purpose of performing timing verification in optimum conditions without any excessive variations by statistically dealing with variations in elemen... | 02/23/2010 |
| 7668040 | Memory device, memory controller and memory system The memory device has: a plurality of banks, each of which has a memory cell array having a plurality of page areas that are selected by row addresses respectively, and each of which is selected by a bank address; a row controller that controls activation of the pag... | 02/23/2010 |
| 7667227 | Semiconductor device and fabrication method thereof A semiconductor device includes a gate electrode formed on a silicon substrate via a gate insulation film in correspondence to a channel region, source and drain regions of a p-type diffusion region formed in the silicon substrate at respective outer sides of sidewa... | 02/23/2010 |
| 7666745 | Method of manufacturing a semiconductor device and a semiconductor device A method of manufacturing a semiconductor device, has forming a gate insulating film over a surface of a substrate, eliminating a portion of the gate insulating film in a region, forming a gate electrode over the gate insulating film and a drain electrode on the reg... | 02/23/2010 |
| 7666553 | Fabrication method for photomask, fabrication method for device and monitoring method for photomask A fabrication method for a photomask is disclosed. Two or more metal containing layers are formed over a substrate, and a main pattern and a monitor pattern are formed over one or more of the two or more metal containing layers other than the lowermost metal contain... | 02/23/2010 |
| 7665053 | Semiconductor device layout method and layout program It is an aspect of the embodiments discussed herein to provide a semiconductor device layout method and a semiconductor device layout program that enable the minimum necessary decoupling capacitances to be placed efficiently according to a circuit configuration, pla... | 02/16/2010 |
| 7665050 | Semiconductor device verification system and semiconductor device fabrication method A semiconductor device verification system capable of verifying operation with great accuracy. A pattern matching verification system outputs interference pattern information. A physical verification system compiles the interference pattern information and a design ... | 02/16/2010 |
| 7664309 | Reticle inspecting apparatus and reticle inspecting method The present invention efficiently suppresses a false defect and realizes reticle inspection where a defect can be detected with high detection sensitivity. In a reticle inspecting method, reticle inspection data generated based on reticle design data is captured. Al... | 02/16/2010 |
| 7663948 | Dynamic random access memory (DRAM) for suppressing a short-circuit current A semiconductor memory device which has a normal memory cell array and a redundant memory cell array for replacing a failure bit in the normal memory cell array, having: a memory cell array having a plurality of word lines, a plurality of bit line pairs crossing the... | 02/16/2010 |
| 7663923 | Semiconductor memory device and control method thereof This invention provides a semiconductor memory device in which standby current is suppressed to a small level. A ROM device includes memory cells for reading data corresponding to impedance between a terminal connected to bit lines and a source terminal and source p... | 02/16/2010 |
| 7663660 | Image display system and image processing device A read unit reads a plurality of pieces of image data from an image storing unit for output, respectively. A destination specifying unit specifies image display units to be display destinations of the image data from the read unit. A divided-period setting unit divi... | 02/16/2010 |
| 7663438 | Differential amplifier circuit A differential amplifier circuit of simple circuit configuration is disclosed, which is capable of releasing an output signal within a voltage range independent of the voltage range of a differential input signal. The differential amplifier circuit 1 includes... | 02/16/2010 |
| 7663392 | Synchronous semiconductor device, and inspection system and method for the same The present invention provides a synchronous semiconductor device suitable for improving the efficiency of application of electrical stresses to the device, an inspection system and an inspection method thereof in order to efficiently carrying out a burn-in stress t... | 02/16/2010 |
| 7663345 | Circuit and method for controlling DC-DC converter A DC-DC converter for generating a stable output voltage and being applicable to a transient load fluctuation. The DC-DC converter detects an input current, and compares the input current with a rated current of an external power supply. The DC-DC converter controls... | 02/16/2010 |
| 7663187 | Semiconductor device and method of fabricating the same An extension region is formed by ion implantation under masking by a gate electrode, and then a substance having a diffusion suppressive function over an impurity contained in a source-and-drain is implanted under masking by the gate electrode and a first sidewall s... | 02/16/2010 |
| 7663175 | Semiconductor integrated circuit device A semiconductor integrated circuit device provided with a plurality of power supply wire layers including a first potential power supply wire and a second potential power supply wire formed in different layers. At least one capacitor contact wire extends from one of... | 02/16/2010 |
| 7663170 | Semiconductor device and method for manufacturing the same A lower electrode film is formed above a semiconductor substrate first, and then a ferroelectric film is formed on the lower electrode film. After that, an upper electrode film is formed on the ferroelectric film. When forming the upper electrode, an IrOx | 02/16/2010 |
| 7661079 | Designing and operating of semiconductor integrated circuit by taking into account process variation A method of designing a semiconductor integrated circuit includes defining a tolerable range in which an operating temperature and an operating power supply voltage of a semiconductor integrated circuit are allowed to vary, computing a target temperature and a targe... | 02/09/2010 |
| 7660974 | Method and apparatus for analyzing performance, and computer product In a performance analyzing apparatus, a setting unit sets an event of which the performance is desired to be monitored, a detecting unit detects an instruction address at the time of generation of an interrupt signal from a timer, and a calculating unit calculates a... | 02/09/2010 |
| 7660184 | Semiconductor memory for disconnecting a bit line from a sense amplifier in a standby period and memory system including the semiconductor memory Each memory block has a plurality of memory cells, and word lines and bit lines connected to the memory cells. Precharge switches connect the bit lines to a precharge line. A switch control circuit controls an operation of the precharge switches and sets a cutoff fu... | 02/09/2010 |