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Robert Millikan, Nobel Prize winner in physics
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| Number | Title | Issue Date |
| 7467100 | Personal shopping data service system using extended gaming machine memory module A video game machine with a portable memory module is used by a customer to generate and store a shopping list and other types of shopping related information. A retailer periodically transmits to the customer a CD-ROM storing merchandise information, coupons, and t... | 12/16/2008 |
| 7446625 | Narrow impedance conversion device An impedance conversion device has four conductors arranged so that the first and second conductors form a transmission line having a first characteristic impedance, the third and fourth conductors form a transmission line having the first characteristic impedance, ... | 11/04/2008 |
| 7403948 | Workflow system and method A workflow system that automates work processes. The workflow system uses an open architecture to support multiple platforms and includes Application Programming Interfaces (APIs) enabling applications to communicate with a workflow engine. The workflow system suppo... | 07/22/2008 |
| 7245635 | System and method for resizing the physical link bandwidth based on utilization thereof A method for allocating and resizing a link on a communication medium is provided. The utilization of an allocated link is monitored and an unused bandwidth thereof is determined. Upon request for allocation of a second link, at least a portion of the unused bandwid... | 07/17/2007 |
| 7229219 | Apparatuses and methods for integrating opto-electric components into the optical pathways of routing substrates with precision optical coupling and compact electrical interconnection Disclosed are apparatuses and methods for fast and reliable integration of opto-electric components onto optical routing substrates. Accurate alignment of optical signals to and from the opto-electric components, and short electrical interconnect paths to the compon... | 06/12/2007 |
| 7224881 | Variable optical attenuator An apparatus for attenuating a light signal is disclosed. The apparatus causes optical attenuation in a waveguide, where the waveguide has an input port for receiving a light signal and an output port for output of an attenuated light signal. First, an electric fiel... | 05/29/2007 |
| 7222081 | System and method for continuous delivery schedule including automated customer notification A system and method for continuously monitoring and updating delivery schedules based on completed deliveries and customer modifications. A delivery scheduling computer stores and updates delivery schedule information, notifying the customer prior to a scheduled del... | 05/22/2007 |
| 7203640 | System and method for determining an intended signal section candidate and a type of noise section candidate An input signal is input via an input part. A plurality of signal section candidate detecting parts having different detection algorithms detect an intended signal section candidate and a noise signal section candidate from the input signal. A signal section classif... | 04/10/2007 |
| 7110364 | Optical link adjacency discovery protocol and an optical network therefor An optical link adjacency discovery protocol is provided. The protocol includes a simple format that includes an identifier field of a local node and facility and an identifier field of an echo node and facility. An announce message, including a source field having ... | 09/19/2006 |
| 6901451 | PCI bridge over network One embodiment of the present invention provides a method for communicating transaction request information from a PCI environment over a network. Another embodiment of the present invention provides a method for communicating request packet information from a netwo... | 05/31/2005 |
| 6877135 | Document display apparatus and method for displaying documents A document display apparatus analyzes document data of electronic documents that are scanning targets (Step S11), calculates a display priority p (Step S12), registers it as priority level information if it is greater than or equal to first set value P... | 04/05/2005 |
| 6839680 | Internet profiling A system, method, and various software products provide for consistent identification of web users across multiple web sites, servers and domains, monitoring and capture of data describing the users' web activities, categorization of the web activity data, aggregati... | 01/04/2005 |
| 6804673 | Access assurance for remote memory access over network A method and system provide access assurance regarding an RDMA transaction. The system comprises an initiating device and a target device placed across a network. The initiating device and the target device are coupled to a first and a second buses, respectively. Th... | 10/12/2004 |
| 6799217 | Shared memory multiprocessor expansion port for multi-node systems A method for communicating between nodes of a plurality of nodes is disclosed. Each node includes a plurality of processors and an interconnect chipset. The method issues a request for data from a processor in a first node and passes the request for data to other no... | 09/28/2004 |
| 6745825 | Plate type heat pipe A sealed plate type metallic heat pipe is disclosed having multiple independent through holes which run through the inside of the heat pipe. All of the through holes are connected in fluid communication at each end. A working fluid is disposed in the through holes a... | 06/08/2004 |
| 6577861 | Electronic shopping system utilizing a program downloadable wireless telephone An electronic shopping system facilitates purchase transactions via a wireless telephone. A purchase transaction program is downloaded from the seller's server to a purchaser's wireless telephone via a program loader contained within the purchaser's wirel... | 06/10/2003 |
| 6560681 | Split sparse directory for a distributed shared memory multiprocessor system A split sparse directory for a distributed shared memory multiprocessor system with multiple nodes, each node including a plurality of processors, each processor having an associated cache. The split sparse directory is in a memory subsystem which include... | 05/06/2003 |
| 6555436 | Simultaneous formation of charge storage and bitline to wordline isolation One aspect of the present invention relates to a method of forming a non-volatile semiconductor memory device, involving the sequential or non-sequential steps of forming a charge trapping dielectric over a substrate, the substrate having a core region an... | 04/29/2003 |
| 6543674 | Multilayer interconnection and method A method for electrically coupling electrode pads comprising forming a reflowed solder bump on a first electrode pad supported by a first substrate. The reflowed solder bump includes a solder material having a solder melting temperature. The method furthe... | 04/08/2003 |
| 6544430 | Methods for detaching a layer from a substrate Improved methods and articles used to fabricate flexible circuit structures are disclosed. The methods include depositing a release layer or a dielectric film on a substrate, and then forming a conductive laminate on the release layer or the dielectric fi... | 04/08/2003 |
| 6543052 | Internet shopping system utilizing set top box and voice recognition An Internet-based electronic shopping system hosted on a television-set-top-box combination controlled by a remote control unit. The set-top box (STB) includes a tuner, an internal or external modem and/or cable modem, configured to communicate with an In... | 04/01/2003 |
| 6542409 | System for reference current tracking in a semiconductor device System for generating a reference current in a semiconductor device. The reference current is compared to an internal device current generated by an internal device circuit to verify operation of the device. The system includes a current generator that ge... | 04/01/2003 |
| 6541816 | Planar structure for non-volatile memory devices One aspect of the present invention relates to a non-volatile semiconductor memory device, containing a substrate, the substrate having a core region and a periphery region; a charge trapping dielectric over the core region of the substrate; a gate dielec... | 04/01/2003 |
| 6542415 | Kickb signal generator A signal generator for generating a kickb signal used to reset a boost signal used to operate a memory device. The signal generator includes an address detector that receives one or more address lines and a clock signal to produce a detector output. A swi... | 04/01/2003 |
| 6539137 | Thermo-electric signal coupler A signal coupler is comprised of a transmitting section and a receiving section. The receiving section includes a polymer pyroelectric film element having a greater than 1% by volume of a high thermal diffusivity material, such as aluminum nitride, to imp... | 03/25/2003 |
| 6518096 | Interconnect assembly and Z-connection method for fine pitch substrates An interconnect assembly and a fluxless method for forming the interconnect assembly. The fluxless method includes providing a first semiconductor substrate having a first pad connected thereto. A post is connected to the first pad and includes a length g... | 02/11/2003 |
| 6513015 | System and method for customer recognition using wireless identification and visual data transmission An electronic shopping system, providing for customer recognition using wireless identification and visual data transmission to point-of-sale terminals and other terminal types located in a commercial establishment. A customer's visual image is taken as a... | 01/28/2003 |
| 6493320 | Automatic initialization and tuning across a high speed, plesiochronous, parallel link A method and apparatus automatically initialize and tune a link in a network system. The link couples one router to another router and may be implemented as a high speed, plesiochronous, parallel link. The apparatus includes a first link control unit coup... | 12/10/2002 |
| 6492229 | Semiconductor device having reduced field oxide recess and method of fabrication A semiconductor device having reduced field oxide recess and method of fabrication is disclosed. The method of fabricating the semiconductor device begins by performing an HF dip process on a substrate after field oxidation followed by performing a select... | 12/10/2002 |
| 6490630 | System and method for avoiding deadlock in multi-node network A computer architecture for avoiding a deadlock condition in an interconnection network comprises a messaging buffer having a size pre-calculated to temporarily store outgoing messages from a node. Messages are classified according to their service requir... | 12/03/2002 |
| 6483708 | Heatsink apparatus for de-coupling clamping forces on an integrated circuit package A clamping system decouples the clamping forces in an electrical circuit assembly coupled to a heatsink. A heatsink clamping assembly applies controllable and predictable force on the electrical circuit assembly including an integrated circuit device ("ch... | 11/19/2002 |
| 6469394 | Conductive interconnect structures and methods for forming conductive interconnect structures Interconnect structures and methods for making interconnect structures are disclosed. A typical interconnect structure has a tapered first end portion having a first substantially planar surface and a concave surface adjacent to the first planar surface. ... | 10/22/2002 |
| 6468865 | Method of simultaneous formation of bitline isolation and periphery oxide One aspect of the present invention relates to a method of forming a non-volatile semiconductor memory device, involving the sequential or non-sequential steps of forming a charge trapping dielectric over a substrate, the substrate having a core region an... | 10/22/2002 |
| 6465306 | Simultaneous formation of charge storage and bitline to wordline isolation One aspect of the present invention relates to a method of forming a non-volatile semiconductor memory device, involving the sequential or non-sequential steps of forming a charge trapping dielectric over a substrate, the substrate having a core region an... | 10/15/2002 |
| 6461973 | Method for forming high quality multiple thickness oxide layers by reducing descum induced defects A method for forming high quality oxide layers having different thicknesses by eliminating descum induced defects is disclosed. A semiconductor substrate is subjected to reactive ion etching. The semiconductor substrate includes a wafer, an oxide layer on... | 10/08/2002 |
| 6459582 | Heatsink apparatus for de-coupling clamping forces on an integrated circuit package A clamping system decouples the clamping forces in an electrical circuit assembly coupled to a heatsink. A heatsink clamping assembly applies controllable and predictable force on the electrical circuit assembly including an integrated circuit device ("ch... | 10/01/2002 |
| 6448106 | Modules with pins and methods for making modules with pins Device modules with pins and methods for making device modules with pins are disclosed. One embodiment is directed to a method including forming a polymeric circuit structure having a first side and a second side on a substrate. The formed first side is a... | 09/10/2002 |
| 6448609 | Method and system for providing a polysilicon stringer monitor A system and method detecting the presence of polysilicon stringers on a memory array using a polysilicon stringer monitor. The polysilicon stringer monitor includes a continuous type-2 layer of polysilicon forming a first row and a second row across the ... | 09/10/2002 |
| 6444921 | Reduced stress and zero stress interposers for integrated-circuit chips, multichip substrates, and the like Disclosed is an interposer for electrically coupling two electrical components having different coefficients of thermal expansion (CTEs). The interposer has two substrates which have different CTE values, with each substrate having a first surface and a s... | 09/03/2002 |
| 6444539 | Method for producing a shallow trench isolation filled with thermal oxide A semiconductor apparatus and method for producing shallow trench isolation. The method includes the steps providing a semiconductor substrate member fabricated having a thin barrier oxide layer on which are fabricated a plurality of spaced apart silicon ... | 09/03/2002 |