A simulation environment for the sport of boxing utilizing a robotic machine interface system which carries a person
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| Number | Title | Issue Date |
| 7550805 | Stress-controlled dielectric integrated circuit General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor ... | 06/23/2009 |
| 7485571 | Method of making an integrated circuit General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor ... | 02/03/2009 |
| 7479694 | Membrane 3D IC fabrication General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor ... | 01/20/2009 |
| 7402897 | Vertical system integration The Vertical System Integration (VSI) invention herein is a method for integration of disparate electronic, optical and MEMS technologies into a single integrated circuit die or component and wherein the individual device layers used in the VSI fabrication processes... | 07/22/2008 |
| 7385835 | Membrane 3D IC fabrication General purpose methods for the fabrication of 5 integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconducto... | 06/10/2008 |
| 7307020 | Membrane 3D IC fabrication General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor ... | 12/11/2007 |
| 7242012 | Lithography device for semiconductor circuit pattern generator General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor ... | 07/10/2007 |
| 7223696 | Methods for maskless lithography General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor ... | 05/29/2007 |
| 7193239 | Three dimensional structure integrated circuit A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, red... | 03/20/2007 |
| 7176545 | Apparatus and methods for maskless pattern generation General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor ... | 02/13/2007 |
| 7138295 | Method of information processing using three dimensional integrated circuits A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, red... | 11/21/2006 |
| 6891387 | System for probing, testing, burn-in, repairing and programming of integrated circuits A system which performs multi-functions including reducing the thickness of oxides on contact pads and probing, testing, burn-in, repairing, programming and binning of integrated circuits. The system includes: at least one module having a holding fixture, a wafer, a... | 05/10/2005 |
| 6838896 | Method and system for probing, testing, burn-in, repairing and programming of integrated circuits in a closed environment using a single apparatus A single gas tight system may perform multi-functions including reducing the thickness of oxides on contact pads and probing, testing, burn-in, repairing, programming and binning of integrated circuits. A holding fixture holds a wafer having integrated circuits and ... | 01/04/2005 |
| 6765279 | Membrane 3D IC fabrication General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor ... | 07/20/2004 |
| 6713327 | Stress controlled dielectric integrated circuit fabrication General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor ... | 03/30/2004 |
| 6714625 | Lithography device for semiconductor circuit pattern generation General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor ... | 03/30/2004 |
| 6682981 | Stress controlled dielectric integrated circuit fabrication General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a sem... | 01/27/2004 |
| 6632706 | Three dimensional structure integrated circuit fabrication process A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory ci... | 10/14/2003 |
| 6563224 | Three dimensional structure integrated circuit A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory ci... | 05/13/2003 |
| 6551857 | Three dimensional structure integrated circuits A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory ci... | 04/22/2003 |
| 6288561 | Method and apparatus for probing, testing, burn-in, repairing and programming of integrated circuits in a closed environment using a single apparatus A single gas tight system which performs multi-functions including reducing the thickness of oxides on contact pads and probing, testing, burn-in, repairing, programming and binning of integrated circuits. A system according to one embodiment of the prese... | 09/11/2001 |
| 6020257 | Membrane dielectric isolation IC fabrication General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a sem... | 02/01/2000 |
| 6008126 | Membrane dielectric isolation IC fabrication General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a sem... | 12/28/1999 |
| 5946559 | Membrane dielectric isolation IC fabrication General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a sem... | 08/31/1999 |
| 5915167 | Three dimensional structure memory A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory ci... | 06/22/1999 |