...that power steering was invented by independent inventor Francis W. Davis? As chief engineer in the 1920s of the truck division of the Pierce Arrow Motor Car Company, he saw how hard it was to steer heavy vehicles. So that he would be able to keep the profits from his future invention, Davis left his job, rented a small engineering shop in Waltham, Mass., and developed a hydraulic power steering system that led to power steering.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8178441 | Semiconductor device and method for manufacturing the same A method for manufacturing a semiconductor device includes forming a gate insulating layer, a gate and a protective layer on a semiconductor substrate, forming a spacer on lateral sides of the protective layer and the gate, forming one or more junction regions in th... | 05/15/2012 |
| 8134213 | Static random access memory and method for manufacturing the same Disclosed is a static random access memory (SRAM), which includes first and second access transistors composed of metal oxide semiconductor (MOS) transistors, first and second drive transistors composed of MOS transistors, and first and second p-channel thin film tr... | 03/13/2012 |
| 8092986 | Exposure methods The present disclosure provides an exposure method for a semiconductor device, in which whether a specific pattern corresponds to a sparse area or a dense area is decided to employ a specific phase-shift mask and by which critical dimension uniformity and resolution... | 01/10/2012 |
| 8063446 | LDMOS device and method for manufacturing the same Provided is a LDMOS device and method for manufacturing. The LDMOS device includes a second conductive type buried layer formed in a first conductive type substrate. A first conductive type first well is formed in the buried layer and a field insulator with a gate i... | 11/22/2011 |
| 8049257 | CMOS image sensor Provided are a CMOS image sensor in which microlenses are formed in a remaining space in a patterned light shielding layer to improve image sensor characteristics and to protect the microlenses during packaging. The CMOS image sensor may include: a semiconductor sub... | 11/01/2011 |
| 8021946 | Nonvolatile memory device and method for fabricating the same A nonvolatile (e.g., flash) memory device includes a substrate having a plurality of isolation areas and active areas; a trench formed on the isolation area; a first electrode layer formed on an inner wall of the trench; a first gate oxide layer formed between the i... | 09/20/2011 |
| 7994554 | CMOS image sensor and manufacturing method thereof Disclosed are a CMOS image sensor and a manufacturing method thereof. The method includes the steps of: forming an isolation layer on a semiconductor substrate, defining an active region that includes a photo diode region and a transistor region; forming a gate in t... | 08/09/2011 |
| 7977794 | Aluminum metal line of a semiconductor device and method of fabricating the same A method of forming an aluminum line of a semiconductor device where first A metal thin layer, a first aluminum layer, and a first B metal thin layer are sequentially applied on an interlayer insulating layer. A photolithography process is performed to form a metal ... | 07/12/2011 |
| 7977770 | Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device includes: forming a first pad including a first metal and an inter-connection line including the first metal in a scribe lane region; forming a second pad including the first metal in a chip region; sequentially formi... | 07/12/2011 |
| 7977753 | High voltage BICMOS device and method for manufacturing the same A high voltage BICMOS device and a method for manufacturing the same, which may improve the reliability of the device by securing a distance between adjacent DUF regions, are provided. The high voltage BICMOS device includes: a reverse diffusion under field (DUF) re... | 07/12/2011 |
| 7973347 | Complementary metal oxide silicon image sensor and method of fabricating the same Disclosed is a method of fabricating a CMOS (Complementary Metal Oxide Silicon) image sensor. The method includes the steps of: forming a device protective layer and a metal interconnection on a substrate formed with a light receiving device; forming an inner micro-... | 07/05/2011 |
| 7973342 | CMOS image sensor and method for manufacturing the same Disclosed are a CMOS image sensor and a method for manufacturing the same, capable of improving the characteristics of the image sensor by increasing junction capacitance of a floating diffusion area. The CMOS image sensor generally includes a photodiode and a plura... | 07/05/2011 |
| 7960839 | Semiconductor interconnection line and method of forming the same An interconnection line of a semiconductor device and a method of forming the same using a dual damascene process are disclosed. An example interconnection line of a semiconductor device includes a semiconductor substrate, a first interconnection line formed on the ... | 06/14/2011 |
| 7956398 | Capacitor of semiconductor device and method of fabricating the same Disclosed are a capacitor of a semiconductor device and a method of fabricating the same. The capacitor includes a capacitor top electrode, a capacitor bottom electrode aligned with a bottom surface and three lateral sides of the capacitor top electrode, and a capac... | 06/07/2011 |
| 7952133 | Flash memory and method for manufacturing the same Provided are a flash memory and a method for manufacturing the same. The flash memory includes a semiconductor substrate having a device isolation region and an active region; a stacked gate on the semiconductor substrate; an insulation layer covering the semiconduc... | 05/31/2011 |
| 7948022 | Flash memory device and method for manufacturing the same A flash memory device, and a manufacturing method thereof, having advantages of protecting sidewalls of a floating gate and a control gate and preventing a recess of an active area of a source region are provided. The method includes forming a tunneling oxide layer ... | 05/24/2011 |
| 7923777 | Power semiconductor device and method for manufacturing the same Disclosed are a power semiconductor device and a method for manufacturing the same. The power semiconductor device has a PIP capacitor and an LDMOS transistor, the LDMOS transistor having second and third gate electrodes separate from a first gate electrode, which m... | 04/12/2011 |
| 7923326 | Memory device and method for manufacturing the same A split gate (flash) EEPROM cell and a method for manufacturing the same is disclosed, in which a control gate and a floating gate are formed in a vertical structure, to minimize a size of the cell, to obtain a high coupling ratio, and to lower a programming voltage... | 04/12/2011 |
| 7910466 | Method of manufacturing high-voltage semiconductor device and low-voltage semiconductor device A high-voltage semiconductor device and a method for making the same are provided. A high-voltage semiconductor device and a low-voltage semiconductor device are formed in a single substrate, a photolithography process that is required to form a high-voltage well re... | 03/22/2011 |
| 7906399 | Narrow width metal oxide semiconductor transistor Disclosed is a semiconductor transistor for enhancing performance of PMOS and NMOS transistors, particularly current driving performance, while reducing a narrow width effect. A narrow width MOS transistor includes: a channel of which width is W0 and length i... | 03/15/2011 |
| 7893437 | Semiconductor device and manufacturing method thereof A semiconductor device and method of manufacturing the same are disclosed. An example semiconductor device includes a semiconductor substrate having a first well, a first source electrode, a drain electrode, and a first gate insulation layer formed on the semiconduc... | 02/22/2011 |
| 7883971 | Gate structure in a trench region of a semiconductor device and method for manufacturing the same Disclosed are a gate structure in a trench region of a semiconductor device and a method for manufacturing the same. The semiconductor device includes a pair of drift regions formed in a semiconductor substrate; a trench region formed between the pair of drift regio... | 02/08/2011 |
| 7883966 | Memory device and method for manufacturing the same A split gate (flash) EEPROM cell and a method for manufacturing the same is disclosed, in which a control gate and a floating gate are formed in a vertical structure, to minimize a size of the cell, to obtain a high coupling ratio, and to lower a programming voltage... | 02/08/2011 |
| 7875524 | Method of fabricating an inductor for a semiconductor device The inductor for a semiconductor device includes at least one dielectric pattern selectively formed on a top of the interlayer dielectric, at least one first metal wire formed on a top of the interlayer dielectric, at least one second metal wire formed on a top of t... | 01/25/2011 |
| 7868368 | Complementary metal oxide semiconductor (CMOS) image sensor A CMOS image sensor and a method for manufacturing the same are provided. The CMOS image sensor enlarges an area of a real image and prevents interference between adjacent pixels by forming a plurality of microlenses on a convex surface and forming a light blocking ... | 01/11/2011 |
| 7839006 | Semiconductor device and method for manufacturing the same A semiconductor device and a method for manufacturing the same prevents copper from being exposed to a surface of a passivation film after a copper metal line formation, to avoid contamination of processing equipment and the process environment. The method includes ... | 11/23/2010 |
| 7838934 | Semiconductor device and method for manufacturing the same A semiconductor device and a method for manufacturing the same are disclosed, in which an insulating layer may be formed in a strained silicon layer under source/drain regions to substantially overcome conventional problems resulting from a channel decrease in the s... | 11/23/2010 |
| 7838917 | CMOS image sensor and method of fabricating the same A CMOS image sensor and method for fabricating the same, wherein the CMOS image sensor has minimized dark current at the boundary area between a photodiode and an isolation layer. The present invention includes a first-conductivity-type doping area formed in the dev... | 11/23/2010 |
| 7838413 | Method of manufacturing phase-change memory element Disclosed is a method of manufacturing a phase-change memory in which the lower electrode of the phase-change memory device is formed using barrier metal for forming a metal interconnection and a via in damascene and dual damascene processes. The method includes the... | 11/23/2010 |
| 7838319 | MOS transistor and manufacturing method thereof There are provided a MOS transistor and a manufacturing method thereof. The MOS transistor includes a substrate on which an insulating layer is formed, a gate embedded in the insulating layer, wherein the top surface of the gate is exposed, a gate oxide layer formed... | 11/23/2010 |
| 7833857 | ESD protecting circuit and manufacturing method thereof An ESD protecting circuit and a manufacturing method thereof are provided. The ESD protecting circuit includes a device isolation layer, first and second high-concentration impurity regions, a third high-concentration impurity region of a complementary type, first a... | 11/16/2010 |
| 7816259 | Method of forming a contact in a semiconductor device Deterioration of yield may be prevented when a contact in a semiconductor device is made by a method including forming a contact hole by selectively removing an insulating layer from a semiconductor substrate, depositing a barrier layer on the insulating layer and o... | 10/19/2010 |
| 7811928 | Semiconductor devices and fabrication methods thereof Semiconductor devices and methods of fabricating semiconductor devices are disclosed. A disclosed semiconductor device includes a silicon substrate, a source region and a drain region. A gate electrode is formed on the silicon substrate. Also, a metal silicide layer... | 10/12/2010 |
| 7811894 | Bipolar junction transistor and manufacturing method thereof An improved bipolar junction transistor and a method for manufacturing the same are provided. The bipolar junction transistor includes: a buried layer and a high concentration N-type collector region in a P-type semiconductor substrate; a low concentration P-type ba... | 10/12/2010 |
| 7807996 | Test pattern of CMOS image sensor and method of measuring process management using the same The test pattern according to the present invention consists of an opaque metal film pattern formed on a semiconductor substrate, an insulating film formed on the semiconductor substrate and the metal film pattern, a red color filter formed on the insulating film, a... | 10/05/2010 |
| 7795084 | Semiconductor device and fabricating method thereof Semiconductor devices and a fabricating method therefore are disclosed. One method includes forming a buffer oxide layer and a buffer nitride layer on the top surface of a semiconductor substrate; forming a photoresist pattern on the pad nitride layer and forming a ... | 09/14/2010 |
| 7790605 | Formation of interconnects through lift-off processing A semiconductor device is provided. The semiconductor device includes a semiconductor substrate including a conducting layer, a first insulating film formed on the semiconductor substrate and having a via hole formed therein, a lower barrier film formed on an inside... | 09/07/2010 |
| 7790547 | Non-volatile memory device and method for fabricating the same A method and non-volatile memory device are provided that are characterized by ion-implantation of impurities in the sidewalls of a first electrode. The inclusion of impurities in the sidewalls eliminates geometric abnormalities, referred to herein as a bird's beak,... | 09/07/2010 |
| 7781865 | MIM capacitor and metal interconnection Disclosed are an MIM (Metal-Insulator-Metal) capacitor and a method of manufacturing the same. The MIM capacitor includes: a lower metal layer and a lower metal interconnection on a substrate; a barrier metal layer on the lower metal layer; an insulating layer on th... | 08/24/2010 |
| 7776671 | Inductor for semiconductor device and method of fabricating the same The inductor for a semiconductor device comprises a first interlayer dielectric formed on a top of a silicon substrate, at least one first metal wire formed on a top of the first interlayer dielectric, a second interlayer dielectric formed on a top of the first inte... | 08/17/2010 |