Famous Patents
3M employee and church chorister Art Fry needed something to temporarily mark pages in his hymnal. He was in luck because his colleague, Spencer Silver, accidentally developed a glue that was too weak for other purposes. After initially discouraging consumer response, Post-it Notes became a hit in 1979.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 6566690 | Single feature size MOS technology power device A MOS technology power device includes a semiconductor material layer of a first conductivity type, a conductive insulated gate layer covering the semiconductor material layer, and a plurality of elementary functional units. The conductive insulated gate ... | 05/20/2003 |
| 6468866 | Single feature size MOS technology power device A MOS technology power device comprises a semiconductor material layer of a first conductivity type, a conductive insulated gate layer covering the semiconductor material layer, and a plurality of elementary functional units. The conductive insulated gate... | 10/22/2002 |
| 6424957 | Method and apparatus for parallel processing of fuzzy rules Method and apparatus of parallel processing of multiple inference rules organized in fuzzy sets or logical functions of multiple fuzzy sets including membership functions defined in a so-called universe of discourse. The inference rules are configured ess... | 07/23/2002 |
| 6407594 | Zero bias current driver control circuit Static current consumption in a low-side output drive stage is eliminated by employing a switch in series with a current generator that is employed for controlling the discharge process of the driving node (gate) of the output power transistor and by cont... | 06/18/2002 |
| 6385598 | Fuzzy processor with architecture for non-fuzzy processing A fuzzy processor with an improved architecture. The fuzzy processor includes a fuzzy rule processor, an internal fuzzy instruction memory, an internal knowledge base memory, an arithmetic-logic unit, a control unit that can execute non-fuzzy instructions... | 05/07/2002 |
| 6369425 | High-density power device A process for manufacturing high-density MOS-technology power devices includes the steps of: forming a conductive insulated gate layer on a surface of a lightly doped semiconductor material layer of a first conductivity type; forming an insulating materia... | 04/09/2002 |
| 6218228 | DMOS device structure, and related manufacturing process A DMOS device structure includes a lightly doped semiconductor layer of a first conductivity type, a plurality of lightly doped semiconductor regions of a second conductivity type extending from a top surface of the lightly doped semiconductor layer there... | 04/17/2001 |
| 6199056 | Apparatus for dividing an integer by 2n with over or under approximation An apparatus over or under approximates the result of dividing a binary number representing an integer 2n. The division by 2n is performed by truncating the n least significant bits of the integer. In order to over or under approxima... | 03/06/2001 |
| 6168981 | Method and apparatus for the localized reduction of the lifetime of charge carriers, particularly in integrated electronic devices A method and apparatus for the localized reduction of the lifetime of charge carriers in integrated electronic devices. The method comprises the step of implanting ions, at a high dosage and at a high energy level, of a noble gas, preferably helium, in th... | 01/02/2001 |
| 6140679 | Zero thermal budget manufacturing process for MOS-technology power devices A zero thermal budget manufacturing process for a MOS-technology power device. The method comprises the steps of: forming a conductive insulated gate layer on a surface of a lightly doped semiconductor material layer of a first conductivity type; removing... | 10/31/2000 |
| 6127847 | High-speed bipolar-to-CMOS logic converter circuit A high-speed bipolar-to-CMOS logic converter circuit, including an input stage, including a differential amplifier meant to be connected to a bipolar-logic circuit portion and to be supplied by the supply voltage of the bipolar-logic portion, and an outpu... | 10/03/2000 |
| 6114746 | Vertical PNP transistor and relative fabrication method A vertical PNP transistor integrated in a semiconductor material wafer having an N type substrate and an N type epitaxial layer forming a surface. The transistor has a P type buried collector region astride the substrate and the epitaxial layer; a collect... | 09/05/2000 |
| 6111297 | MOS-technology power device integrated structure and manufacturing process thereof A MOS-technology power device integrated structure includes a first plurality of elongated doped semiconductor stripes of a first conductivity type formed in a semiconductor layer of a second conductivity type, each including an elongated source region of... | 08/29/2000 |
| 6090669 | Fabrication method for high voltage devices with at least one deep edge ring A fabrication method for high voltage power devices with at least one deep edge ring includes the steps of growing a lightly doped N-type epitaxial layer on a heavily doped N-type substrate, growing an oxide on the upper portion of the epitaxial layer, ma... | 07/18/2000 |
| 6061672 | Fuzzy logic neural network modular architecture The invention relates to a modular architecture of a cellular network for improved large-scale integration, of the type which comprises a plurality of fuzzy cellular elements (Cm,n) interconnected to form a matrix of elements having at least m ... | 05/09/2000 |
| 6054737 | High density MOS technology power device A MOS technology power device comprises a semiconductor material layer of a first conductivity type, a plurality of elementary functional units, a first insulating material layer placed above the semiconductor material layer and a conductive material laye... | 04/25/2000 |
| 6051862 | MOS-technology power device integrated structure A MOS-gated power device integrated structure comprises a plurality of elementary units formed in a semiconductor material layer of a first conductivity type. Each elementary unit is formed in a body stripe of a second conductivity type. There are a plura... | 04/18/2000 |
| 6051933 | Bipolar power device having an integrated thermal protection for driving electric loads A monolithically integrated power device for driving electrical loads includes a power stage having a high-voltage bipolar transistor and a low-voltage auxiliary transistor cascade-connected and inserted between a first power supply terminal and a second ... | 04/18/2000 |
| 6047276 | Cellular neural network to implement the unfolded Chua's circuit A neural cellular network for implementing a so-called Chua's circuit, and comprising at least first, second and third cells having respective first and second input terminals and respective state terminals, the first and second input terminals being to r... | 04/04/2000 |
| 6033947 | Driving circuit for electronic semiconductor devices including at least a power transistor The invention relates to a control circuit for semiconductor devices which is formed on a substrate (1) doped by a first dopant type, the integrated circuit comprising a first epitaxial layer (2) grown on the substrate (1) and doped by the first dopant ty... | 03/07/2000 |
| 6030888 | Method of fabricating high-voltage junction-isolated semiconductor devices A method of fabricating a junction-isolated semiconductor device is provided which includes the following steps. Within a first P-type buried region second N-type buried regions are formed. Over the first and second buried regions, an N-type epitaxial lay... | 02/29/2000 |
| 5986323 | High-frequency bipolar transistor structure A high-frequency bipolar transistor structure includes a base region of a first conductivity type formed in a silicon layer of a second conductivity type, the base region comprising an intrinsic base region surrounded by an extrinsic base region, an emitt... | 11/16/1999 |
| 5963065 | Low offset push-pull amplifier A low offset amplifier has an output stage constituted by an npn transistor and a pnp transistor in a push-pull arrangement, and a driver stage. The latter includes a current-mirror circuit having, in its input branch, a pnp transistor in series with a fi... | 10/05/1999 |
| 5952874 | Threshold extracting method and circuit using the same A transistor threshold extraction circuit having an output and including a first and a second transistor of the same type each having a control terminal and having essentially the same threshold voltage, the control terminal of the first transistor being ... | 09/14/1999 |
| 5945819 | Voltage regulator with fast response The invention relates to a voltage regulator connected between first and second voltage references and having an output terminal for delivering a regulated output voltage. The voltage regulator includes at least one voltage divider, connected between the ... | 08/31/1999 |
| 5943664 | Memory and method for storing membership functions using vertices and slopes Memory and storage method in an electronic controller operating with fuzzy logic procedures for membership functions (FA) of logical variables (M) defined in a so-called discourse universe (U) discretized at a finite number of points (m) which provide mem... | 08/24/1999 |
| 5939769 | Bipolar power transistor with high collector breakdown voltage and related manufacturing process There is described a bipolar power transistor with high breakdown voltage, obtained in a heavily doped semiconductor substrate of the N type, over which a lightly doped N type layer, constituting a collector region of the transistor, is superimposed. The ... | 08/17/1999 |
| 5915247 | Method for storing membership functions and related circuit for calculating a grade of membership of antecedents of fuzzy rules A method for storing a membership function, include storing a position of a vertex of a triangle that defines the membership function in a universe of discourse and storing a first distance between the position of the vertex a point of intersection betwee... | 06/22/1999 |
| 5914642 | Temperature independent current controlled multivibrator A current-controlled multivibrator having increased accuracy independent of variations in process and temperature. The oscillator employs a bandgap voltage in combination with a current generator to ensure operational stability despite temperature and pro... | 06/22/1999 |
| 5900652 | Apparatus for the localized reduction of the lifetime of charge carriers, particularly in integrated electronic devices A method and apparatus for the localized reduction of the lifetime of charge carriers in integrated electronic devices. The method comprises the step of implanting ions, at a high dosage and at a high energy level, of a noble gas, preferably helium, in th... | 05/04/1999 |
| 5900662 | MOS technology power device with low output resistance and low capacitance, and related manufacturing process A MOS-gated power device includes a plurality of elementary functional units, each elementary functional unit including a body region of a first conductivity type formed in a semiconductor material layer of a second conductivity type having a first resist... | 05/04/1999 |
| 5895249 | Integrated edge structure for high voltage semiconductor devices and related manufacturing process An integrated edge structure for a high voltage semiconductor device comprising a PN junction represented by a diffused region of a first conductivity type extending from a semiconductor device top surface is described. The edge structure comprises a firs... | 04/20/1999 |
| 5888889 | Integrated structure pad assembly for lead bonding A process for manufacturing an integrated structure pad assembly for wire bonding to a power semiconductor device chip including a chip portion having a top surface covered by a metallization layer which has a first sub-portion wherein functionally active... | 03/30/1999 |
| 5886381 | MOS integrated device comprising a gate protection diode The device presents a polysilicon layer extending over a wafer of semiconductor material, along the edge of the active region of the device, and partly over a thick field oxide layer which externally delimits the active region. The polysilicon layer forms... | 03/23/1999 |
| 5883412 | Low gate resistance high-speed MOS-technology integrated structure A high-speed MOS-technology power device integrated structure includes a plurality of elementary functional units formed in a lightly doped semiconductor layer of a first conductivity type, the elementary functional units including channel regions of a se... | 03/16/1999 |
| 5880628 | High-efficiency voltage booster circuit operating at very low supply voltage A voltage booster circuit including a pull-up capacitor connected to the supply line via a PMOS switching transistor. The other terminal of the pull-up capacitor is supplied with a pull-up voltage switching between a first value determining charging of th... | 03/09/1999 |
| 5878811 | Apparatus and method for the controlled cooling of chemical tanks An apparatus for the controlled cooling of chemical tanks containing a chemical which must be kept at a first prescribed temperature includes at least one heat-exchanger coil immersed inside a chemical tank and through which there is made to circulate a f... | 03/09/1999 |
| 5875438 | Method for storing membership functions and related circuit for calculating a grade of membership of antecedents of fuzzy rules A method for storing a membership function, include storing a position of a vertex of a triangle that defines the membership function in a universe of discourse and storing a first distance between the position of the vertex a point of intersection betwee... | 02/23/1999 |
| 5874338 | MOS-technology power device and process of making same A MOS-technology power device including a semiconductor material layer of a first conductivity type having a body region disposed therein. The body region includes a heavily doped region of a second conductivity type, a lightly doped region of the second ... | 02/23/1999 |
| 5869357 | Metallization and wire bonding process for manufacturing power semiconductor devices A metallization and bonding process for manufacturing a power semiconductor device includes a step of depositing a first metal layer over the entire surface of a chip; a step of selectively etching of the first metal layer to form desired patterns of meta... | 02/09/1999 |
