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| Number | Title | Issue Date |
| 7016971 | Congestion management in a distributed computer system multiplying current variable injection rate with a constant to set new variable injection rate at source node A distributed computer system includes links and routing devices coupled between the links and routing frames between the links. Each of the routing devices includes a congestion control mechanism for detecting congestion at the routing device and responding to dete... | 03/21/2006 |
| 6697954 | Method/apparatus for preserving state of an event during powerup reset sequence based on state of an event signal immediately prior to the reset Context or other functional settings are protected during a power up reset sequence in a computer system, without the need to save such context or settings in static memory. A signal, representing a change in the context, is delayed beyond a critical peri... | 02/24/2004 |
| 6690389 | Tone modifying dithering system A method for correcting the tone of an input image for display on a given output device includes the steps of generating a dither template having advantageously more threshold levels than color levels of the input image. A tone characteristic for the outp... | 02/10/2004 |
| 6658506 | Method and apparatus for performing timing verification of a circuit A system for accurately determining Elmore delays in DCVSL structures is disclosed. The system uses circuit simulation to determine models for Elmore delays through devices within specific circuit structures. The circuit structures include DCVSL circuits ... | 12/02/2003 |
| 6603414 | Method for digital compression of characters Groups of characters, including alpha, numeric, or other symbols, are represented in a binary form by one or more first or second code representations for each character. The first code representation will have a value indicative of a predetermined number... | 08/05/2003 |
| 6591372 | Zero clock skew computer module The length of the phase lock feedback path of the phase lock loop chip (PLL chip) is adjusted so that the timing of clock pulses at computer chips is measured relative to the arrival time of a clock pulse at the computer board clock pin. This adjustment o... | 07/08/2003 |
| 6571111 | Method and apparatus for reducing battery power consumption of transceivers in a communications network using an external generated timing signal In a compunctions network of low power devices, power consumption of the devices is reduced by periodically receiving a timing signal in each device from a transmitter external to the network. A real-time clock in each of the devices is synchronized to th... | 05/27/2003 |
| 6567774 | Method and system for configuring and updating networked client stations using a virtual disk and a snapshot disk A system and method for facilitating configuration of client stations in a computer network. A virtual disk representing configuration information is formed and selectively exported via the network to the client stations. The stations are configured with ... | 05/20/2003 |
| 6563595 | Method of communicating with a SCSI bus device that does not have an assigned SCSI address A SCSI device resides and communicates on the SCSI bus without that device being assigned a SCSI address or corresponding SCSI ID. The driver software on the host computer directs the SCSI initiator device to select itself as its target, so the initiator ... | 05/13/2003 |
| 6559843 | Segmented ray casting data parallel volume rendering Volumetric data are rendered onto an image plane by first organizing the volumetric data into a plurality of blocks of data, each block of data including a plurality of voxels arranged in cubic structure. The blocks of volumetric data are stored in, and p... | 05/06/2003 |
| 6556708 | Technique for classifying objects within an image A technique for classifying objects within an image is disclosed. In one embodiment, the technique is realized by identifying a portion of an image, and then filtering the portion of the image based upon an object characteristic and a reference within the... | 04/29/2003 |
| 6557115 | Real-time test controller The real-time test controller maintains a failure database containing a history of past failures for devices under test and selectively sorts the history for the device to be tested. The diagnostic testing sequence is then rearranged with tests having hig... | 04/29/2003 |
| 6549215 | System and method for displaying images using anamorphic video An image is displayed using anamorphic video. A first portion of an image is displayed on a display at a first scale. At least one second portion of the image is displayed on the display. The at least one second portion is adjacent the first portion of th... | 04/15/2003 |
| 6549930 | Method for scheduling threads in a multithreaded processor A method is provided for scheduling execution of a plurality of threads executed in a multithreaded processor. Resource utilizations of each of the plurality of threads are measured while the plurality of threads are concurrently executing in the multithr... | 04/15/2003 |
| 6545981 | System and method for implementing error detection and recovery in a system area network A system and method for facilitating both in-order and out-of-order packet reception in a SAN includes requestor and responder nodes, coupled by a plurality of paths, that maintain the good and bad status of each path and also maintain local copies of a m... | 04/08/2003 |
| 6539414 | Incorporating collateral and concurrent activity in a data processing transaction Incorporation of a collateral process as a participant in a transaction is made possible by a method and system in accordance with the present invention. Typically, after the transaction is initiated, the collateral process is called and then is registere... | 03/25/2003 |
| 6525733 | Video graphics controller with high speed line draw processor A graphics processor uses a line draw facility to receive first and second values indicative of the coordinates of respective first and second end points of a line. The reception of the second value is sensed by the line draw facility and line data is gen... | 02/25/2003 |
| 6519127 | Solid state safety relay A solid state safety relay comprises: a first driver circuit; a second driver circuit; a charge disconnect transistor coupled to the first driver circuit and configured to control the flow of current along a current path; a first discharge disconnect tran... | 02/11/2003 |
| 6516032 | First-order difference compression for interleaved image data in a high-speed image compositor An encoder accepts an N byte set of values for each of a plurality of image components, with N being greater than one and, for each N byte set of values, identifies a compressed symbol length, K, wherein K is the smallest integer such that the difference ... | 02/04/2003 |
| 6512551 | Platform for displaying information from multiple sources A display system for concurrently displaying stored display information and received information, having a display monitor, receiver for receiving television signals, and a sub-system having a storage unit and a processor, which sub-system can operate sim... | 01/28/2003 |
| 6507610 | Cordless modem system having multiple base and remote stations which are interusable and secure A cordless modem system where a mobile station unit (MSU) is located in the computer and a base station unit (BSU) is connected to the telephone line. A radio frequency (RF) link is developed between the two units to allow a cordless connection. A series ... | 01/14/2003 |
| 6505268 | Data distribution in a disk array For use with a computer system having an intelligent mass storage disk array subsystem, including a microprocessor controller, a method for the distribution of data within the disk array based upon logical commands issued by the computer system. The disk ... | 01/07/2003 |
| 6505217 | Method and apparatus for file placement A file placement process operates to respond to requests for creation of a file, accompanied by file statistics, such as storage space needed by the file, to locate a storage volume having space best fitting the file statistics.... | 01/07/2003 |
| 6501836 | Audio system for a personal computer An audio system for multimedia computer systems and method for use are provided including an audio module having speakers, a microphone and associated circuitry. The audio module is adapted to be interposed between a monitor and a monitor pedestal such th... | 12/31/2002 |
| 6498731 | System for protecting electronic components A protective assembly for electronic components. The protective assembly has a base and a first printed circuit board secured to the base. An electronic component is disposed on the printed circuit board and protected by a rigid member that is also secure... | 12/24/2002 |
| 6496825 | Systems and methods for the detection of a loop-back of a transaction Systems and Methods for identifying in the gateway processes or application processes whether an imported transaction is a loop-back transaction, and if so performing work for the imported transaction under the parent transaction. Upon receiving a work re... | 12/17/2002 |
| 6496940 | Multiple processor system with standby sparing A multiprocessor system includes a number of sub-processor systems, each substantially identically constructed, and each comprising a central processing unit (CPU), and at least one I/O device, interconnected by routing apparatus that also interconnects t... | 12/17/2002 |
| 6493656 | Drive error logging A method and apparatus for logging errors in a storage device. As commands are executed by the storage device a list of previously executed commands is maintained. When an error is detected by the storage device, the previously executed commands and certa... | 12/10/2002 |
| 6493801 | Adaptive dirty-block purging An adaptive cache coherent purging protocol includes recognizing system performance, especially latency, is affected by when cache is purged. The occurrence of performance enhancing and degrading events regarding a cache are counted and compared to a thre... | 12/10/2002 |
| 6487628 | Peripheral component interface with multiple data channels and reduced latency over a system area network A peripheral control interface provides access to a system area network for a plurality of peripheral devices connected to the PCI through an I/O bus. A plurality of virtual data channels is defined in local memory to which outstanding requests from perip... | 11/26/2002 |
| 6487308 | Method and apparatus for providing 64-bit YUV to RGB color conversion A method of providing conversion from YUV signals to RGB signals includes the steps of determining a correspondence value between each of the Y, U, and V pixel values and the corresponding one of the R, G, and B pixel values. Three tables are generated; a... | 11/26/2002 |
| 6487611 | Seamless distributed job control between a multifunction peripheral and a host A system for seamless distributed job control between a multifunction peripheral and a host. A host, such as a personal computer, is linked with one or more multifunction peripherals. Each multifunction peripheral has at least scanning and printing capabi... | 11/26/2002 |
| 6480398 | CPU easy access panels A computer system includes a frame for attaching a plurality of electronic components including a predetermined electronic component. A cover for covering the electronic components is provided along with a mask having an opening. The mask is disposed betw... | 11/12/2002 |
| 6480376 | Elevationally adjustable portable computer docking station A portable computer docking station housing is provided on its bottom side with a support foot structure which is pivotable relative to the housing to prop it up on a horizontal work station surface in a selectively variable one of a series of different f... | 11/12/2002 |
| 6477663 | Method and apparatus for providing process pair protection for complex applications A method and apparatus for providing process-pair protection to complex applications is provided. The apparatus of the present invention includes a process-pair manager or PPM. The PPM is replicated so that a respective PPM is deployed on each of two comp... | 11/05/2002 |
| 6473525 | Method for detecting an image edge within a dithered image A method for detecting an image edge within a dithered image. A pixel within a support region is selected for processing. The differences between pixel values in the region and the selected pixel are computed to form a current difference map. Whether the ... | 10/29/2002 |
| 6473888 | Timing verifier for MOS devices and related method The present invention relates to a method and apparatus for determining capacitance and charge models for MOS devices to be used in calculating delays in a timing verifier for a circuit. The models are generated by first creating a variety of configuratio... | 10/29/2002 |
| 6473774 | Method and apparatus for record addressing in partitioned files A method and apparatus introduces the creation and use of two record addressing functions. One function "computeRID" assigns identifiers to records, and the other function "lookupRID" performs the related task of locating a record given its identifier.... | 10/29/2002 |
| 6473795 | In-band/out-of-band alert delivery system An in-band/out-of-band alert delivery system for a computer system manager includes an alert log which maintains a record of alerts to be delivered and the status of those alerts, an alert manager for making a first attempt to deliver each alert, and a re... | 10/29/2002 |
| 6470443 | Pipelined multi-thread processor selecting thread instruction in inter-stage buffer based on count information A multi-threaded processor comprising a pipeline including a number of stages processing instructions belonging to a plurality of threads. A buffer stores instructions from different ones of the threads. Count logic stores count information relating to ea... | 10/22/2002 |
