Celebrity Inventors
Actor Zeppo Marx patented a "Cardiac Pulse Rate Monitor" in 1969.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 6662336 | Error correction method and apparatus Using a Berlekamp-Massey process operating with unique recursion rules, a fast correction subsystem performs, for each t-byte codeword having m-bit symbols, a series of error locator iterations, followed by a series of error evaluator iterations, followed... | 12/09/2003 |
| 6504664 | Locating index mark in rotating magnetic storage media A rotating storage medium has an index mark-indicating sequence recorded thereon, the index mark-indicating sequence comprised of bits distributed over plural servo wedges. The index mark-indicating sequence is comprised of at least one bit in each of a s... | 01/07/2003 |
| 6434719 | Error correction using reliability values for data matrix Erroneous column(s) in the matrix of data obtained from a transmission channel are first determined on the basis of column parity violation. An error instance in the matrix is next ascertained by matching the erroneous column(s) with an error event charac... | 08/13/2002 |
| 6321246 | Linear phase FIR sinc filter with multiplexing A phase shifter is implemented using a polyphase filter. The filter is preferably a linear phase Finite Impulse Response (FIR) filter. The amount of delay imparted by the phase shifter is determined by a particular set of coefficients selected from a plur... | 11/20/2001 |
| 6317765 | Sinc filter with selective decimation ratios A decimation filter implements selective decimation ratios by arranging a plurality of sinc filters in different pipeline arrangements to produce the desired ratio. Power savings area achieved by implementing the sinc filters as FIR sinc filters and by im... | 11/13/2001 |
| 6266753 | Memory manager for multi-media apparatus and method therefor A virtual memory manager for a multi-media engine allows individual media units to operate in their own virtual space in much the same way as a software program operating in virtual mode. The virtual memory controller performs address translation or mappi... | 07/24/2001 |
| 6208481 | Gain and phase constrained adaptive equalizing filter in a sampled amplitude read channel for magnetic recording A sampled amplitude read channel for magnetic disk recording which asynchronously samples the analog read signal, adaptively equalizes the resulting discrete time sample values according to a target partial response, extracts synchronous sample values thr... | 03/27/2001 |
| 6183122 | Multiplier sign extension A digital parallel multiplier having encoders for each segmented bit pair of the multiplier input data and which selects one of 4 coefficients, based on the sum of the bit pair, that are then applied to the multiplicand input data to form a plurality of f... | 02/06/2001 |
| 6181347 | Selectable mode smoothing texture filter for computer graphics A graphics system including a selectable mode smoothing filter for improved texture mapping. An x, y pixel coordinate is mapped into a u, v texture map. The mapped u, v coordinate includes integer and fractional portions. Depending on the location of the ... | 01/30/2001 |
| 6169502 | Pipelined analog-to-digital converter (ADC) systems, methods, and computer program products A pipelined analog-to-digital converter (ADC) is calibrated to enable production of an n-bit digital output representing an n-2 bit binary word, where "n" is a selected large positive integer, for example without limitation on the order of ten (10). In an... | 01/02/2001 |
| 6149319 | Computer system host adapter for controlling signal levels to peripheral cards A method and apparatus for maintaining the voltage level of data signals supplied to an integrated circuit, such as a PCMCIA card, at the same level as power also provided to the integrated circuit. Circuitry for maintaining the voltages at the same level... | 11/21/2000 |
| 6148048 | Receive path implementation for an intermediate frequency transceiver A receive path implementation for an intermediate frequency (IF) transceiver is disclosed that provides increased signal processing integrity and accuracy with an efficient and improved design. A complex filter for a bandpass delta-sigma analog-to-digital... | 11/14/2000 |
| 6140947 | Encoding with economical codebook memory utilization In an encoding method which utilizes plural codebooks, certain bits of a user data input sequence are considered as branch selection bit(s) which determine (1) how the remainder of the input sequence is to be divided into plural subsequences and (2) which... | 10/31/2000 |
| 6138190 | Analog front end and digital signal processing device and method A modem interface communicates data between a computer and a modem that is coupled to an external communication network. The modem interface includes a host interface for coupling to a host processor of the computer, an analog interface for coupling to th... | 10/24/2000 |
| 6137533 | System and method for enhancing dynamic range in images A system and method of enhancing dynamic range in images is disclosed that increases the contrast in the resulting image without requiring an increase in the dynamic range of the analog-to-digital converter used to convert the analog image signals to digi... | 10/24/2000 |
| 6130674 | Dynamically selectable texture filter for computer graphics A graphics system including a selectable mode filter for improved texture mapping. An x, y pixel coordinate is mapped into a u, v texture map. The mapped u, v coordinate includes integer and fractional portions. Depending on the location of the coordinate... | 10/10/2000 |
| 6125469 | Error correction method and apparatus A magnetic disk storage device employing an on-the-fly, multiple burst error correction system for detecting and correcting errors in data sectors stored on a magnetic disk, wherein each data sector comprises a data field and multiple sync marks for synch... | 09/26/2000 |
| 6121974 | Priority storage system for fast memory devices A process and implementing computer system for graphics applications in which information files such as texture maps (TMs) are prioritized and stored in a relatively fast local memory. The method of prioritization includes initially sorting the informatio... | 09/19/2000 |
| 6118413 | Dual displays having independent resolutions and refresh rates A video controller for controlling at least two video displays having independent refresh rates and pixel resolutions. In a first embodiment, two separate data paths are provided within a video controller for each video display (e.g., CRT and LCD). Taking... | 09/12/2000 |
| 6115032 | CRT to FPD conversion/protection apparatus and method The present invention allows a single display controller design to be used in multiple markets by providing an additional stand-alone circuit which converts conventional analog CRT display signals to digital flat panel display or other digital display sig... | 09/05/2000 |
| 6111710 | Asynchronous/synchronous gain control for interpolated timing recovery in a sampled amplitude read channel A sampled amplitude read channel is disclosed for reading data recorded on a disk storage medium by asynchronously sampling an analog read signal, equalizing the asynchronous sample values according to a desired partial response, and interpolating the equ... | 08/29/2000 |
| 6111420 | Fine alignment IC handler and method for assembling the same The apparatus of the present invention includes a frame for attaching the clamp of a hand test socket to a workpress assembly of a high-speed IC handler. The frame attaches to a workpress assembly. Utilizing the clamp of a test socket recycles frequently ... | 08/29/2000 |
| 6112269 | Modem interface unit with power saving sleep mode A modem interface unit is provided for coupling a communications modem to a host processor. The modem interface unit includes a host interface for coupling to a host processor, an anlog interface for coupling to a communications modem and a digital signal... | 08/29/2000 |
| 6108151 | Sampled amplitude read channel for reading user data and embedded servo data from a magnetic medium A sampled amplitude read channel is disclosed for reading data recorded on a disk storage medium by detecting an estimated binary sequence from a sequence of discrete time sample values generated by sampling pulses in an analog read signal from a read hea... | 08/22/2000 |
| 6108015 | Circuits, systems and methods for interfacing processing circuitry with a memory A processing system 100 is provided which includes processing circuitry 103 fabricated on an integrated circuit chip 107. An internal memory 104a is also fabricated on chip 107. A first first-in/first-out memory 201 is provided having an input for receivi... | 08/22/2000 |
| 6104876 | PCI bus master retry fixup A technique for providing PCI bus mastering compatibility for legacy PCI bus devices which may not support PCI bus mastering RETRY protocols. DLDMM provider software in a device driver for a target device may provide a callback signal at a callback addres... | 08/15/2000 |
| 6100736 | Frequency doubler using digital delay lock loop A phase comparator compares phase of a clock signal and a generated comparison clock signal based upon rising edges. The output of the phase comparator may include a series of short up (U) pulses or down (D) pulses, depending whether the phase of the comp... | 08/08/2000 |
| 6097776 | Maximum likelihood estimation of symbol offset The present invention describes a method of estimating the symbol time offset in a received signal of a data modem using only one received synchronization symbol. This estimate of the offset is used for a rapid synchronization during the starting phase or... | 08/01/2000 |
| 6097401 | Integrated graphics processor having a block transfer engine for automatic graphic operations in a graphics system The present invention discloses methods and apparatus for implementing automatic graphics operations with selectable triggering mechanism. One mechanism is hardware related, using the vertical counter in the video control section of the graphics processor... | 08/01/2000 |
| 6098192 | Cost reduced finite field processor for error correction in computer storage devices A cost reduced finite field processor is disclosed for computing the logarithm LOG (j) of an element of a finite field GF(2n) using significantly less circuitry than that required by a lookup table typically ... | 08/01/2000 |
| 6094226 | System and method for utilizing a two-dimensional adaptive filter for reducing flicker in interlaced television images converted from non-interlaced computer graphics data A system and method for conversion of graphics from computer graphics formats to television formats is disclosed. More particularly, an improved scaling and flicker reduction system and method is disclosed for scaling personal computer (PC) graphics forma... | 07/25/2000 |
| 6091349 | Noise management scheme for high-speed mixed-signal integrated circuits A technique for separating an operation of a digital stage into separate noise generation periods in order to time the generation of noise from the digital stage. The invention is utilized in a mixed-signal integrated circuit having analog and digital sig... | 07/18/2000 |
| 6088046 | Host DMA through subsystem XY processing A process and implementing computer system in which a graphics subsystem 117 having an XY coordinate addressing system interfaces with a host computer system having a linear addressing configuration. The subsystem includes an internal graphics engine 325,... | 07/11/2000 |
| 6084538 | Offset calibration of a flash ADC array A system and method is disclosed for calibrating comparators of an ADC. Individual comparators may be calibrated at random or psuedo-random times while the ADC is performing conversions without the addition of extra "proxy" or replacement comparators. Mor... | 07/04/2000 |
| 6085214 | Digital multiplier with multiplier encoding involving 3X term A digital parallel multiplier having encoders for each segmented bit pair of the multiplier input data and which selects one of 4 coefficients, based on the sum of the bit pair, that are then applied to the multiplicand input data. When a 3X coefficient o... | 07/04/2000 |
| 6081858 | Apparatus and method for shaping random waveforms A method and circuit to regulate a random waveform signal to ensure that the LED indicator driven by the waveform signal is visible to the human eye is provided. The method and circuit first determines whether there is a pulse occurring. If an on-going pu... | 06/27/2000 |
| 6078319 | Programmable core-voltage solution for a video controller An integrated circuit such as a video controller may be provided with core logic circuitry using CMOS technology which may be operated at different supply voltages such as 3.3 or 5 Volts. At lower supply voltages, the CMOS circuitry may run slower. For a ... | 06/20/2000 |
| 6078444 | Read channel auxiliary high precision data conversion A circuit is provided for use with analog to digital conversion techniques in sampled amplitude read channel integrated circuits. A common ADC may be utilized for conversion of both high frequency disk data such as user data and servo data, for example, a... | 06/20/2000 |
| 6075513 | Method and apparatus for automatically maintaining a predetermined image quality in a display system A digital system provides command data to a display system during the display time period such that minimal image degradation occurs. The digital system includes a CPU coupled to a graphics controller coupled to a display system via a cable. The display s... | 06/13/2000 |
| 6073158 | System and method for processing multiple received signal sources A system and method for time slicing multiple received data streams utilizing multiple processors in such a manner as to ensure that all processors are running at full capability and are efficiently timesharing a global memory storage area. The received d... | 06/06/2000 |
