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| Number | Title | Issue Date |
| 6246351 | LSB interpolation circuit and method for segmented digital-to-analog converter A segmented digital-to-analog converter includes a string DAC (210) and an interpolation DAC (211). The string DAC includes 2M series-connected string resistors (Ri) and 2M pairs of switches (Sia,b). The switch pairs couple a first (... | 06/12/2001 |
| 6246394 | Touch screen measurement circuit and method A touch screen digitizing system includes a touch screen unit including a first resistive sheet with opposed x+ and x- terminals and a second resistive sheet with opposed y+ and y- terminals, and an ADC having first and second reference input terminals. A... | 06/12/2001 |
| 6201835 | Frequency-shaped pseudo-random chopper stabilization circuit and method for delta-sigma modulator A system for reducing sensitivity of an integrated circuit chopper-stabilized amplifier to intermodulation applies a pseudo-random sequence signal (11A) to an LSB of a first input of a first adder. An error feedback signal (18) is applied to a second inpu... | 03/13/2001 |
| 6201375 | Overvoltage sensing and correction circuitry and method for low dropout voltage regulator An LDO voltage regulator includes an error amplifier having a first input coupled to a first reference voltage, a second input receiving a feedback signal, and an output producing a first control signal. An output transistor has a gate, a drain coupled to... | 03/13/2001 |
| 6198296 | Bridge sensor linearization circuit and method A linearization circuit includes a sensor circuit having a first terminal receiving an excitation voltage, and second and third terminals producing a sensor output voltage therebetween. A differential amplifier circuit produces a linearization current, an... | 03/06/2001 |
| 6194946 | Method and circuit for compensating the non-linearity of capacitors Capacitor voltage coefficient errors are reduced in a lossy integrator by providing oppositely oriented first and second feedback capacitors in a switched capacitor feedback circuit coupled between the output and a summing conductor connected to an invert... | 02/27/2001 |
| 6191715 | System for calibration of a digital-to-analog converter A self-calibrating digital-to-analog converter includes a delta-sigma modulator (25) receiving a digital input signal, an output producing a stream of digital pulses the density of which represents a value of the digital input signal, and an intermediate ... | 02/20/2001 |
| 6188212 | Low dropout voltage regulator circuit including gate offset servo circuit powered by charge pump A low drop out voltage regulator includes an error amplifier (12) having a first input coupled to a first reference voltage (VREF), a second input receiving a feedback signal, and an output (15) producing an output signal (VAMPOUT). ... | 02/13/2001 |
| 6150971 | R/2R' ladder switch circuit and method for digital-to-analog converter A digital-to-analog converter includes a resistive divider network including a plurality of series resistors of resistance R and a plurality of shunt resistors of resistance 2R' and a circuit for switching a shunt resistor of the resistive divider network... | 11/21/2000 |
| 6150883 | Rail-to-rail input/output operational amplifier and method A differential amplifier includes a rail-to-rail input stage including differentially coupled first (13) and second (14) P-channel input transistors, and differentially coupled third (17) and fourth (18) N-channel input transistors. The drains of the firs... | 11/21/2000 |
| 6147633 | Analog-to-digital converter having offset removing function In a delta-sigma type analog-to-digital converter, an offset varying during operation is removed, and a reduction in time required to generate a stable value after powering on the converter is achieved. A high pass filter is provided with a variable filte... | 11/14/2000 |
| 6140872 | Offset-compensated amplifier input stage and method An offset-compensated amplifier including an input stage (2) having a current source (10), first (11) and second (12) FETs each having a source connected to the current source, first (17) and second (18) input FETs each having a source connected to a drai... | 10/31/2000 |
| 6118340 | Low noise differential input, differential output amplifier and method A low noise differential amplifier includes a differential stage and first and second unbalanced differential feedback amplifiers. The differential stage includes first (13) and second (14) load devices coupled to first (11) and second (12) conductors, re... | 09/12/2000 |
| 6094155 | Dual reference voltage buffer and method for updating CDAC bit capacitors A circuit for producing a stable CDAC reference voltage in a successive approximation analog-to-digital converter includes a circuit (27) producing an input reference voltage (VREFIN), and a buffer circuit (12) producing a stable reference voltage in resp... | 07/25/2000 |
| 6087897 | Offset and non-linearity compensated amplifier and method Circuitry in an amplifier (1) provides both auto-zeroing of offset errors and finite gain compensation. The circuitry includes a differential main amplifier (3) and a differential auxiliary amplifier (13). During a first phase ($c;1), a previously samp... | 07/11/2000 |
| 6080644 | Complementary bipolar/CMOS epitaxial structure and process An epitaxial layer is formed on a P type silicon substrate in which a plurality of P+ buried layer regions, a plurality of N+ buried layer regions, and a P+ field layer region occupying most of the substrate surface are diffused. The substrate is loaded i... | 06/27/2000 |
| 6072355 | Bootstrapped CMOS sample and hold circuitry and method A bootstrap sample and hold circuit accurately acquires and holds values of a high frequency analog input signal, to avoid harmonic distortion of a signal representing the analog input signal in, for example, a pipeline ADC, includes a first sampling MOSF... | 06/06/2000 |
| 6060874 | Method of curvature compensation, offset compensation, and capacitance trimming of a switched capacitor band gap reference Curvature in a reference voltage produced by a switched capacitor band gap reference circuit is compensated by producing a first ƊVBE voltage by causing first and second PTAT/R currents to flow through a first ƊVBE -generating circ... | 05/09/2000 |
| 6061224 | PWM solenoid driver and method A solenoid driver circuit includes an input terminal for receiving a solenoid actuation pulse, an output terminal for connection to a terminal of a solenoid coil, a pull-in current adjustment terminal, and a hold-in current duty cycle adjustment terminal.... | 05/09/2000 |
| 6037887 | Programmable gain for delta sigma analog-to-digital converter A programmable gain delta sigma analog-to-digital converter includes an analog input terminal receiving an analog input voltage, a charge summing conductor, an input capacitive switching circuit, and a feedback reference capacitive switching circuit coupl... | 03/14/2000 |
| 6002276 | Stable output bias current circuitry and method for low-impedance CMOS output stage A CMOS output circuit including a differential error amplifier (3) is operated to provide a stable quiescent bias current in an output MOSFET by causing a first current equal to a threshold voltage of a P-channel reference MOSFET (M1) divided by the resis... | 12/14/1999 |
| 5977895 | Waveform shaping circuit for function circuit and high order delta sigma modulator A waveform shaping circuit for use in a function circuit is provided which minimizes interference with a feedback circuit of the function circuit and a load. The waveform shaping circuit disposed in the function circuit includes a voltage transfer unit an... | 11/02/1999 |
| 5973564 | Operational amplifier push-pull output stage with low quiescent current An operational amplifier output circuit having a low, stable quiescent current includes an input stage (22) receiving an input voltage (vin ") and producing first (v1) and second (v2) signals. An output stage (23) includes... | 10/26/1999 |
| 5969658 | R/2R ladder circuit and method for digital-to-analog converter A digital-to-analog converter includes an input circuit (9) producing a plurality of corresponding switch control signals (25) in response to a digital input signal (DIN) and a resistive ladder network (10A) including an R/2R MSB ladder section... | 10/19/1999 |
| 5946181 | Thermal shutdown circuit and method for sensing thermal gradients to extrapolate hot spot temperature A circuit provides at least partial thermal shutdown of an integrated circuit chip including a functional circuit (7) in response to detection of a hot spot in a first area of the chip. First (Q1) and second (Q3) transistors in a second area (3) of the ch... | 08/31/1999 |
| 5939944 | NPN push-pull output stage with folded cascode JFETs A push-pull output stage includes an NPN pull-up transistor (Q6) and an NPN pull-down transistor (Q7) connected to an output. A compensation capacitor 17 is coupled between the collector and base of the pull-down transistor. A differential input stage inc... | 08/17/1999 |
| 5917376 | Circuit and technique for compensating high gain amplifier without compensation capacitors A three-stage amplifier including first, second, and third sequentially coupled stages is compensated without use of compensation capacitors, by applying an input signal to an input of the first stage and a first input of a first feed-forward stage, coupl... | 06/29/1999 |
| 5914681 | Fast wakeup biasing circuit for analog-to-digital converter Power control circuitry is provided in an analog-to-digital converter (1) having a CDAC array (2) coupled to an analog input signal, a comparator (3), and a successive approximation register circuit (5). The power control circuitry includes a bias control... | 06/22/1999 |
| 5905398 | Capacitor array having user-adjustable, manufacturer-trimmable capacitance and method A programmable integrated circuit capacitor array includes a plurality of binarily weighted capacitors (16) and a plurality of switches (18) selectively coupling the capacitors in parallel between first and second terminals. A control circuit (10) respond... | 05/18/1999 |
| 5905427 | Integrated circuit resistor array An integrated circuit resistor array suitable for use as resistors included in a high performance analog integrated circuit is provided. A plurality of resistor stripes are collectively arranged in a region on a substrate. The resistor stripes are made of... | 05/18/1999 |
| 5892356 | High impedance large output voltage regulated cascode current mirror structure and method The voltage swing on an output conductor of a high speed, high dynamic range regulated cascode current mirror is increased by providing a first transistor (M1) of a first conductivity type having a source electrode coupled to a first reference voltage con... | 04/06/1999 |
| 5880618 | CMOS differential voltage controlled logarithmic attenuator and method A logarithmic attenuator circuit includes a resistive attenuator in which the series resistors are P-channel MOSFETs with gate electrodes connected to VDD and the parallel resistors are P-channel MOSFETs which also function as switches. A contr... | 03/09/1999 |
| 5856799 | Rotation system for correction of weighting element errors in digital-to-analog converter A digital-to-analog converter is provided which compensates for relative errors among weighting elements used for D/A conversion. The converter includes a decoder, a rotator, and a weighting section. The rotator receives decoded signals from a decoder to ... | 01/05/1999 |
| 5856749 | Stable output bias current circuitry and method for low-impedance CMOS output stage A CMOS output circuit including a differential error amplifier (3) is operated to provide a stable quiescent bias current in an output MOSFET by causing a first current equal to a threshold voltage of a P-channel reference MOSFET (M1) divided by the resis... | 01/05/1999 |
| 5847601 | Switched capacitor common mode feedback circuit for differential operational amplifier and method An operational amplifier circuit includes a differential operational amplifier and a common mode feedback circuit with first and second transistors (16 and 20) having source electrodes connected to first and second supply voltage conductors and drains cou... | 12/08/1998 |
| 5841310 | Current-to-voltage integrator for analog-to-digital converter, and method An integrating circuit includes an operational amplifier and an integrating capacitor which is decoupled from the output of the operational amplifier and precharged to a positive reference voltage before each integration cycle. During each integration cyc... | 11/24/1998 |
| 5835038 | DC dither circuitry and method for delta-sigma modulator A characteristic tone in a delta-sigma analog-to-digital converter is shifted out of an audible pass band without diminishing dynamic range or signal-to-noise ratio thereof by operating the digital-to-analog converter to measure its offset voltage. If the... | 11/10/1998 |
| 5821826 | Oscillator circuit synchronization An apparatus and method for generating signals. According to one embodiment, the apparatus has an oscillator generating a series of signals, an output stage for transforming the series of signals into a second series of signals, and a watchdog for providi... | 10/13/1998 |
| 5815051 | Differential filter circuit and integrated circuit structure therefor Differential filters for removing both normal-mode and common-mode noises are provided. A first-order differential low pass filter is composed of a first resistor connected between a first input terminal and a first output terminal, a second resistor havi... | 09/29/1998 |
| 5815381 | Single-barrier closed loop DC-to-DC converter and method A DC to DC converter repeatedly divides a first digital signal (26) into 8 time frames, and repeatedly generates a second digital signal (VS) during one of the 8 time frames. A DC input signal (VIN) is converted to a pulse width modu... | 09/29/1998 |
