Did You Know...
...that it was melting ice cream that inspired the invention of the outboard motor? It was a lovely August day and Ole Evinrude was rowing his boat to his favorite island picnic spot. As he rowed, he watched his ice cream melt and wished he had a faster way to get to the island. At that moment the idea for the outboard motor was born!
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| Number | Title | Issue Date |
| 7606188 | Explicit congestion notification for DOCSIS based broadband communication systems Satellite communications are carried out using the Data Over Cable Interface Specification (DOCSIS). Satellite modems are notified of upstream channel congestion by inserting a congestion notification message in a medium access protocol (MAP) message for the upstrea... | 10/20/2009 |
| 7606161 | Distributing information across equal-cost paths in a network A method of distributing data across a network having a plurality of equal-cost paths. Also, a device for distributing data over a network according to the method. The data, which is typically contained in data packets, may be distributed based on at least one attri... | 10/20/2009 |
| 7606157 | Apparatus and method for communicating arbitrarily encoded data over a 1-gigabit ethernet Methods and Systems for transmitting data originating according to a first communications standard over a physical layer using a second communications standard are provided. A data stream is received from a physical transmission medium that uses particular first com... | 10/20/2009 |
| 7605854 | Operational amplifier for an active pixel sensor The present invention includes operational amplifier for an active pixel sensor that detects optical energy and generates an analog output that is proportional to the optical energy. The active pixel sensor operates in a number of different modes including: signal i... | 10/20/2009 |
| 7605734 | Digital to analog converter with reduced ringing Binary indications are converted to an analog representation with significant reduction in ringing at the transitions between successive binary indications and in the period during each binary indication. The binary indications are disposed in a row-and-column matri... | 10/20/2009 |
| 7605665 | Fractional-N phase locked loop An apparatus and method is disclosed to substantially reduce phase noise introduced in fractional-N phase-locked loop (PLL) through feedback modulation. A fractional frequency divider is introduced in the feedback path of the PLL to generate a true fractional divisi... | 10/20/2009 |
| 7603506 | Motherboard with video data processing card capability The motherboard comprises a CPU and a memory component; further at least one video data processing chip mounted to the motherboard wherein the video data processing chip is programmable; and further at least one additional memory component provided to store a softwa... | 10/13/2009 |
| 7603098 | Programmable IF frequency filter for enabling a compromise between DC offset rejection and image rejection The invention enables a compromise between DC offset rejection and image rejection through the use of a bandpass filter having a variable center frequency. ... | 10/13/2009 |
| 7603085 | Bandpass filter with integrated variable gain function The invention enables a gain adjustment in a receiver to improve signal quality. ... | 10/13/2009 |
| 7602867 | System and method for linear distortion estimation by way of equalizer coefficients Provided is a method and system for estimating distortion in a communications channel including an adaptive equalizer. The method includes determining one or more adaptive filter coefficients associated with a signal passed through the equalizer. The method also inc... | 10/13/2009 |
| 7602839 | Chip blanking and processing in SCDMA to mitigate impulse and burst noise and/or distortion A system for mitigating impairment in a communication system includes a delay block, a signal level block, a moving average window block, an impulse noise detection block, and a combiner. The delay block receives and delays each chip of a plurality of chips in a spr... | 10/13/2009 |
| 7602816 | Systems and methods for serial packet synchronization in a voice processing system A serial packet sync encoder is used to encode a serial packet sync datastream. In an embodiment, the serial packet sync datastream is made up of the packet sync vector and a unique preamble bit sequence that is preselected. In another embodiment, the serial packet ... | 10/13/2009 |
| 7602815 | Using network time protocol in voice over packet transmission One or more methods and systems of effectively transmitting voice and voice band data from one node to another are presented. In one embodiment, the system comprises an NTP time server generating absolute times to computing devices such as residential voice over int... | 10/13/2009 |
| 7602242 | Method and system for polar modulating QAM signals with discontinuous phase Aspects of a method and system for polar modulating QAM signals with discontinuous phase may include amplifying a signal via a plurality of amplifiers such that a combined gain of the plurality of amplifiers comprises a coarse amplitude gain and an amplitude offset ... | 10/13/2009 |
| 7600214 | Use of metadata for seamless updates The invention provides a system and method for updating software in the CPU of a network device without interrupting the operation of the network device. The invention determines whether operating state information is recoverable. If it is not recoverable, then it w... | 10/06/2009 |
| 7600180 | Iterative metric updating when decoding LDPC (low density parity check) coded signals and LDPC coded modulation signals Iterative metric updating when decoding LDPC (Low Density Parity Check) coded signals and LDPC coded modulation signals. A novel approach is presented for updating the bit metrics employed when performing iterative decoding of LDPC coded signals. This bit metric upd... | 10/06/2009 |
| 7600176 | Performing multiple Reed-Solomon (RS) software error correction coding (ECC) Galois field computations simultaneously Performing multiple Reed-Solomon (RS) software error correction coding (ECC) Galois field computations simultaneously in a RISC processor. A means is presented by which multiple Galois field computations are performed in parallel with one another. Processor, memory,... | 10/06/2009 |
| 7600131 | Distributed processing in a cryptography acceleration chip Provided is an architecture for a cryptography accelerator chip that allows significant performance improvements over previous prior art designs. In various embodiments, the architecture enables parallel processing of packets through a plurality of cryptography engi... | 10/06/2009 |
| 7600122 | Methods and apparatus for accelerating secure session processing Methods and apparatus are provided for an entity such as a CPU to efficiently call a cryptography accelerator to perform cryptographic operations. A function call causes the cryptography accelerator to execute multiple cryptographic operations in a manner tailored f... | 10/06/2009 |
| 7600102 | Condition bits for controlling branch processing A processing pipeline with a plurality of pipeline stages is described, with the processing pipeline comprising a front end and a back end. The processing pipeline's front end comprises an array for storing at least two condition bits, the condition bits being adapt... | 10/06/2009 |
| 7600057 | Method and system for configurable drain mechanism in two-way handshake system A method and system for configurable drain for two-way handshake system is provided and may comprise coupling a transmitting device to a drain bucket, and draining unwanted data at the transmitting device. The drain bucket may be configurably coupled to the transmit... | 10/06/2009 |
| 7599677 | Charge pump circuit having switches A charge pump circuit that supplies current to an offset current of an output signal for an oscillating circuit is disclosed. The charge pump circuit includes a first switch and a second switch. The first switch is coupled to a gate of an output diode that provides ... | 10/06/2009 |
| 7599662 | Method and system for frequency feedback adjustment in digital receivers In RF transceivers, a method and a system for a frequency feedback adjustment in digital receivers are provided. A DC offset may result from the difference in frequencies between an RF transmitter and an RF receiver. An adjustment of the receiver's frequency may be ... | 10/06/2009 |
| 7599447 | Method and system for a reduced emissions direct drive transmitter for unshielded twisted pair (UTP) applications In a transmitter that includes a plurality of partitioned DAC processing cells coupled to a corresponding plurality of partitioned encoder processing cells, a method for processing signals may include aggregating outputs of each of the plurality of partitioned DAC p... | 10/06/2009 |
| 7599423 | Successive interference canceling for CDMA Successive interference canceling for CDMA. ICI may result from a signal's multi-path effects, or by filtering/suppression of some of the component energy of the signaling waveforms. Energy component attenuation destroys orthogonality of CDMA symbols thereby causing... | 10/06/2009 |
| 7599369 | Apparatus and methods for hardware payload header suppression, expansion, and verification in a DOCSIS network The present invention provides apparatus and methods for performing payload header suppression (PHS), expansion, and verification in hardware. A PHS verify circuit reads a data packet until it reaches the location where the first byte must be compared to PHS rule ve... | 10/06/2009 |
| 7598962 | Graphics display system with window descriptors A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, a graphics input and an audio input simultaneously. The chip uses window descriptors to describe lo... | 10/06/2009 |
| 7598813 | Radio frequency amplifier with constant gain setting Radio frequency amplifier with constant gain setting. A circuitry that includes triple well connected MOSFETs is employed to eliminate body effects therein. The voltage gain as presented herein, being implemented using a ratio of certain elements within the circuitr... | 10/06/2009 |
| 7598811 | Current-controlled CMOS (C3MOS) fully differential integrated wideband amplifier/equalizer with adjustable gain and frequency response without additional power or loading Current-controlled CMOS (C3MOS) fully differential integrated wideband amplifier/equalizer with adjustable gain and frequency response without additional power or loading. A novel approach is presented by which adjustable amplification and equalizer may be achieved ... | 10/06/2009 |
| 7598788 | Current-controlled CMOS (C3MOS) fully differential integrated delay cell with variable delay and high bandwidth Current-controlled CMOS (C3MOS) fully differential integrated delay cell with variable delay and high bandwidth. A novel implementation includes a wideband differential transistor pair and a cross-coupled differential transistor pair. The wideband differential trans... | 10/06/2009 |
| 7598480 | Apparatus and method of image processing to avoid image saturation An imaging device includes a plurality of photo-diodes that operate as optical pixels arranged in a plurality of columns on a single CMOS substrate. The outputs of the multiple pixel sensors, or photo-diodes, are examined to determine if a one pixel, or a region of ... | 10/06/2009 |
| 7596669 | Apparatus and method for managing memory in a network switch The present invention is related to a method and apparatus for managing memory in a network switch, wherein the memory includes the steps of providing a memory, wherein the memory includes a plurality of memory locations configured to store data therein and providin... | 09/29/2009 |
| 7596628 | Method and system for transparent TCP offload (TTO) with a user space library Certain aspects of a method and system for transparent TCP offload with a user space library are disclosed. Aspects of a method may include collecting TCP segments in a network interface card (NIC) without transferring state information to a host system. When an eve... | 09/29/2009 |
| 7596363 | Method and system for measuring receiver mixer IQ mismatch Aspects for measuring receiver mixer IQ mismatch in a transceiver are described. The measuring includes providing a training signal for a receiver mixer, the training signal having periodic, uncorrelated I and Q signals. A phase mismatch in the receiver mixer is det... | 09/29/2009 |
| 7596362 | DC offset calibration for a radio transceiver mixer A mixer for a radio transceiver includes a commutating mixer switch having a first differential input port coupled to a DC offset cancellation path. The first differential input port of the mixer switch includes a first terminal coupled to a first end of a first res... | 09/29/2009 |
| 7596356 | On-chip baseband-to-RF interface and applications thereof An on-chip baseband-to-RF interface includes a receive/transmit section, a control section, and a clock section. The receive/transmit section, when in a receive mode, provides the stream of inbound symbols from the RF circuit to the baseband processing module and, w... | 09/29/2009 |
| 7596195 | Bandpass filter with reversible IQ polarity to enable a high side or low side injection receiver architecture The invention enables a reversing IQ polarity in a bandpass filter so that the bandpass filter can filter signals with high side or low side injection. ... | 09/29/2009 |
| 7596189 | Quadrature receiver sampling architecture Quadrature receiver sampling architecture. A signal ADC performs analog to digital conversion for both I and Q streams. An analog MUX selects the appropriate I and the Q baseband analog input streams for input to the ADC at the appropriate time. A digital filter may... | 09/29/2009 |
| 7596148 | Receiving data from virtual channels A method for receiving data from a plurality of virtual channels begins by storing a stream of data as a plurality of data segments, wherein the stream of data includes multiplexed data fragments from at least one of the plurality of virtual channels, and wherein a ... | 09/29/2009 |
| 7596137 | Packet routing and vectoring based on payload comparison with spatially related templates An Internet infrastructure with network devices and end point devices containing service module manager and service modules supports packet routing and vectoring based on payload comparison with spatially related templates. The network device supports packet content... | 09/29/2009 |
