Quotables
"Radio has no future."
Lord Kelvin, British mathematician and physicist ; 1897
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7451427 | Bus representation for efficient physical synthesis of integrated circuit designs A method for the abstraction of connectivity that provides an intermediate data path representation of integrated circuit (IC) designs is provided. The connectivity abstraction maintains the compactness of a bus level representation as well as the uniqueness of a bi... | 11/11/2008 |
| 7349835 | Method, system and computer program product for generating and verifying isolation logic modules in design of integrated circuits A method, system and computer program product for generating and verifying the correctness of isolation logic modules in design of integrated circuits (ICs). The method disclosed generates an isolation logic module for each power domain specified by a user, instanti... | 03/25/2008 |
| 7277840 | Method for detecting bus contention from RTL description A method for efficiently detecting bus contention from a register transfer level (RTL) description is provided. A bus contention occurs if more than two components try to propagate data onto a bus at the same time. The provided method simulates possible input combin... | 10/02/2007 |
| 7216321 | Pattern recognition in an integrated circuit design A method for recognizing a pattern in a design of an integrated circuit (IC), comprising identifying a pattern correspondence element in a pattern instance. A pattern tree corresponding to the pattern instance is built. A list of candidate design correspondence elem... | 05/08/2007 |
| 7076748 | Identification and implementation of clock gating in the design of integrated circuits Identification and implementation of clock gating in the design of an integrated circuit (IC) is performed with automated assistance. Electrical power consumption is reduced by clock gating. The automated assistance identifies registers that are candidates for clock... | 07/11/2006 |
| 7073146 | Method for clock synchronization validation in integrated circuit design Unsynchronized clock-domain crossings in the design of integrated circuit are detected by searching for clock-crossing domains. For each clock-crossing that does not include an explicit synchronization cell, an analysis determines if the clock is stable crossing the... | 07/04/2006 |
| 6876934 | Method for determining fault coverage from RTL description A method for evaluating the upper bound fault coverage of an integrated circuit (IC) or a portion thereof from register transfer level (RTL) description is provided. The method requires the analysis of a circuit described in RTL consisting of primary input and outpu... | 04/05/2005 |
