Did You Know...
...that several people are credited with the invention of the flush toilet? Most people have heard of Thomas Crapper (1837-1910), the sanitary engineer who invented the valve-and-siphon arrangement that made the modern toilet possible. Another claimant to "the throne" was British inventor Alexander Cumming who patented a toilet in 1775. Then there's a nameless Minoan (a native of ancient Crete) who lived 4,000 years ago who supposedly was ahead of his time and created the first flush toilet!
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| Number | Title | Issue Date |
| 8178961 | Semiconductor package structure and package process A semiconductor package structure and a package process are provided, wherein a lower surface of a die pad of a leadframe is exposed by an encapsulant so as to improve the heat dissipation efficiency of the semiconductor package structure. In addition, two chips are... | 05/15/2012 |
| 8178156 | Surface treatment process for circuit board A surface treatment process for a circuit board is provided. The circuit board includes a substrate, a first circuit layer disposed on an upper surface of the substrate, and a second circuit layer disposed on a lower surface of the substrate. The first circuit layer... | 05/15/2012 |
| 8158888 | Circuit substrate and method of fabricating the same and chip package structure A circuit substrate suitable for being connected to at least one solder ball is provided. The circuit substrate includes a substrate, at least one bonding pad, and a solder mask. The substrate has a surface. The bonding pad is disposed on the surface of the substrat... | 04/17/2012 |
| 8154125 | Chip package structure A chip package structure including a carrier, a chip, and an underfill layer is disclosed. The carrier has a number of bumps disposed thereon. The chip has an active surface. The chip is flip-chip bonded and electrically connected to the carrier through the bumps su... | 04/10/2012 |
| 8143101 | Semiconductor package and the method of making the same The present invention relates to semiconductor package and the method of making the same. The method of the invention comprises the following steps: (a) providing a first substrate; (b) mounting a first chip onto a surface of the first substrate; (c) forming a plura... | 03/27/2012 |
| 8132320 | Circuit board process A circuit board process is provided. In the circuit board process, a first substrate and a second substrate are stacked to form a cavity for accommodating chips. The top of the cavity is covered by a third metal layer that serves as a mask. The first substrate has a... | 03/13/2012 |
| 8125061 | Semiconductor package and method of manufacturing the same A semiconductor package is provided. The semiconductor package includes a carrier, a die, a metal sheet and a molding compound. The die is disposed on the carrier. The metal sheet has a first portion and a second portion, wherein a receiving space is defined by the ... | 02/28/2012 |
| 8124447 | Manufacturing method of advanced quad flat non-leaded package The manufacturing method of advanced quad flat non-leaded packages includes performing a pre-cutting process prior to the backside etching process for defining the contact terminals. The pre-cutting process ensures the isolation of individual contact terminals and i... | 02/28/2012 |
| 8120148 | Package structure with embedded die and method of fabricating the same A package structure with an embedded die includes a core layer, a first build-up wiring structure, and a second build-up wiring structure. The core layer has a first surface and a second surface opposite thereto. Besides, the core layer includes a first dielectric l... | 02/21/2012 |
| 8115285 | Advanced quad flat no lead chip package having a protective layer to enhance surface mounting and manufacturing methods thereof A semiconductor package and related methods are described. In one embodiment, the package includes a die pad, multiple leads, a chip, a package body, and a protective layer. The die pad includes an upper sloped portion, a lower sloped portion, and a peripheral edge ... | 02/14/2012 |
| 8115104 | Circuit board with buried conductive trace formed thereon and method for manufacturing the same A circuit board with a buried conductive trace formed thereon according to the present invention is provided. A buried conductive trace layer is formed on the surface of a substrate and the pads and fingers of the conductive trace layer are heightened to facilitate ... | 02/14/2012 |
| 8110931 | Wafer and semiconductor package A wafer defines a plurality of chips arranged in array manner. Each chip includes at least one aluminum pad and a middle material. The middle material covers the aluminum pad and is mounted on the aluminum pad. ... | 02/07/2012 |
| 8110928 | Stacked-type chip package structure and method of fabricating the same A stacked-type chip package structure including a first package structure, a second package structure, and a first molding compound is provided. The first package structure includes a first substrate, and a first chip stacked thereon and electrically connected there... | 02/07/2012 |
| 8110902 | Chip package and manufacturing method thereof A chip package including at least a shielding layer for better electromagnetic interferences shielding is provided. The shielding layer disposed over the top surface of the laminate substrate can protect the chip package from the underneath EMI radiation. The chip p... | 02/07/2012 |
| 8106492 | Semiconductor package and manufacturing method thereof The advanced quad flat non-leaded package structure includes a carrier having a die pad and a plurality of leads, at least a chip, a plurality of wires, and a molding compound. The rough surface of the carrier enhances the adhesion between the carrier and the surrou... | 01/31/2012 |
| 8105877 | Method of fabricating a stacked type chip package structure A stacked type chip package structure including a package structure, a corresponding substrate, and a number of second bumps is provided. The package structure includes a first chip, a second chip, a number of first bumps, and a first underfill. The first chip is di... | 01/31/2012 |
| 8104171 | Method of fabricating multi-layered substrate The present invention directs to fabrication methods of single-sided or double-sided multi-layered substrate by providing a lamination structure having at least a core structure and first and second laminate structures stacked over both surfaces of the core structur... | 01/31/2012 |
| 8102669 | Chip package structure with shielding cover A chip package structure with a shielding cover includes a substrate, a chip, a pair of first passive components, a pair of second passive components, and a shielding cover. The chip, the pair of first passive components, the pair of second passive components, and t... | 01/24/2012 |
| 8096461 | Wire-bonding machine with cover-gas supply device A wire-bonding machine includes a main body, a fixture block, a mounting block, a gas supply tube, a cover-gas supply device, a capillary tool and an electrode. The fixture block is provided with a chamber defined therein and a central bore formed at one side wall o... | 01/17/2012 |
| 8093690 | Chip package and manufacturing method thereof A chip package including a shielding layer having a plurality of conductive connectors for better electromagnetic interferences shielding is provided. The conductive connectors can be flexibly arranged within the molding compound for better shielding performance. Th... | 01/10/2012 |
| 8089164 | Substrate having optional circuits and structure of flip chip bonding The present invention relates to a substrate having optional circuits and a structure of flip chip bonding. The substrate includes a substrate body, at least one substrate pad, a first conductive trace and a second conductive trace. The substrate body has a surface.... | 01/03/2012 |
| 8076786 | Semiconductor package and method for packaging a semiconductor package A wire bonding structure includes a chip and a bonding wire. The chip includes a base material, at least one first metallic pad, a re-distribution layer and at least one second metallic pad. The first metallic pad is disposed on the base material. The re-distributio... | 12/13/2011 |
| 8072064 | Semiconductor package and method for making the same The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes a first chip and a second chip. The first chip comprises a first active surface, at least one first non-top metal layer and a plurality of f... | 12/06/2011 |
| 8059422 | Thermally enhanced package structure A manufacturing process for a thermally enhanced package is disclosed. First, a substrate strip including at least a substrate is provided. Next, at least a chip is disposed on an upper surface of the substrate, and the chip is electrically connected to the substrat... | 11/15/2011 |
| 8058725 | Package structure and package substrate thereof A package structure and a package substrate thereof are provided. The package structure includes a package substrate, a chip and a molding compound. The package substrate has an upper surface and a lower surface. The lower surface has a molding area and a pad area. ... | 11/15/2011 |
| 8053906 | Semiconductor package and method for processing and bonding a wire A copper bonding wire includes a line portion and a non-spherical block portion. The non-spherical block portion is physically connected to the line portion, and the cross-sectional area of the non-spherical block portion is bigger than that of the line portion.... | 11/08/2011 |
| 8053367 | Wafer polishing method A wafer polishing method is provided. First, a wafer, having a first surface, a second surface, and a plurality of opening portions depressed on the first surface, is provided. A plastic adhesive is filled in the opening portions and cured later. A polishing step is... | 11/08/2011 |
| 8049589 | Balun circuit manufactured by integrate passive device process A Balun circuit manufactured by integrate passive device (IPD) process is provided. The Balun circuit includes a substrate, a first coplanar spiral structure, and a second coplanar spiral structure. At least two first left half coils of the first coplanar spiral str... | 11/01/2011 |
| 8049337 | Substrate and manufacturing method of package structure A substrate board and a manufacturing method of a package structure are provided. The substrate board includes a first surface, a die-attaching area, a cutting area, a plurality of first pads and a first solder mask. The die-attaching area for attaching a die is loc... | 11/01/2011 |
| 8049116 | Circuit substrate and method for fabricating inductive circuit A circuit substrate including a laminated layer, an embedded electronic device, at least a circuit structure, and a solder mask layer is provided. The embedded electronic device is disposed within the laminated layer. The circuit structure is disposed on a surface o... | 11/01/2011 |
| 8044420 | Light emitting diode package structure The present invention relates to a method for forming a package structure for a light emitting diode (LED) and the LED package structure thereof. By employing the same sawing process to cut through the trenches of the leadframe, the package units are singulated and ... | 10/25/2011 |
| 8039930 | Package structure for wireless communication module A package structure for a wireless communication module is disclosed and includes: a substrate having an upper surface defining a supporting region, an annular ground pad surrounding the supporting region, and at least one auxiliary ground pad formed in the supporti... | 10/18/2011 |
| 8039393 | Semiconductor structure, method for manufacturing semiconductor structure and semiconductor package A semiconductor structure, a method for manufacturing a semiconductor structure and a semiconductor package are provided. The method for manufacturing a semiconductor structure includes the following steps. Firstly, a silicon substrate is provided. Next, a part of t... | 10/18/2011 |
| 8035213 | Chip package structure and method of manufacturing the same A chip package structure and a method of manufacturing the same are provided. The chip package structure includes a package portion and a plurality of external conductors. The package portion includes a distribution layer, a chip, a plurality internal conductors and... | 10/11/2011 |
| 8022534 | Semiconductor package using an active type heat-spreading element A semiconductor package includes a carrier, a chip, a stiffener, a heat spreader and an active type heat-spreading element. The chip and the stiffener are disposed on the carrier. The heat spreader is disposed on the stiffener and includes a through opening. The act... | 09/20/2011 |
| 8018075 | Semiconductor package, method for enhancing the bond of a bonding wire, and method for manufacturing a semiconductor package A wire bonding structure of a semiconductor package includes a bonding wire, a pad and a non-conductive adhesive material. The bonding wire includes a line portion and a block portion, wherein the block portion is physically connected to the line portion, and the se... | 09/13/2011 |
| 8012800 | Method of fabricating a stacked type chip package structure and a stacked type package structure A method of fabricating a stacked type chip package structure is provided. The method includes following steps. First, a substrate, a first chip, and a second chip are provided. A number of bumps are disposed on a surface of the second chip. The second chip is then ... | 09/06/2011 |
| 8008992 | Transformer with symmetric structure A transformer is provided with four capacitors and four inductors. The first capacitor is electrically connected between a first port and ground in series. The first inductor is electrically connected to the first port in series. The second capacitor is electrically... | 08/30/2011 |
| 8008987 | Balun circuit manufactured by integrate passive device process A Balun circuit manufactured by integrate passive device (IPD) process. The Balun circuit includes a substrate, a first coplanar spiral structure, and a second coplanar spiral structure. One end of the innermost first left coil of the first coplanar spiral structure... | 08/30/2011 |
| 8008784 | Package including a lead frame, a chip and a sealant A package and a fabricating method thereof are provided. The package includes a lead frame, a chip and a sealant. The lead frame has a notch and a plurality of first notch-side leads, a plurality of first notch-side pads, a plurality of second notch-side leads and a... | 08/30/2011 |
