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| Number | Title | Issue Date |
| 6129458 | Cache optimization method A cache optimization method which analyzes an existing cache mapping scheme and determines a new cache mapping scheme that eliminates cache collisions. In a first embodiment, an application is traced while running in its main working set by a processor to... | 10/10/2000 |
| 6014125 | Image processing apparatus including horizontal and vertical scaling for a computer display A scaling apparatus is disclosed for horizontally and vertically scaling scan line information stored in a video memory prior to providing the scan line information to a computer display. Horizontal scaling apparatus is provided in which a first clock sig... | 01/11/2000 |
| 5894153 | Field implant for silicon controlled rectifier An integrated circuit formed on a semiconductor substrate has a contact pad for communicating signals between an external device and an internal signal line. The pad is protected by an SCR that conducts electrostatic discharge pulses from the pad directly... | 04/13/1999 |
| 5869900 | Sea-of-cells array of transistors The invention concerns integrated circuits in which a MACRO is embedded in a standard cell array. One level of metal is devoted exclusively to non-local interconnect, and a layer of polysilicon is devoted to local interconnect, thereby saving significant ... | 02/09/1999 |
| 5835755 | Multi-processor computer system for operating parallel client/server database processes A method and apparatus for operating parallel databases in a multi-processor computer system. Client Applications interact with a Navigation Server executing on the computer system, and through it, with one or more Data Servers. The Navigation Server rece... | 11/10/1998 |
| 5828011 | High voltage stylus for portable computer The invention concerns a stylus for producing a high-voltage, sinusoidal signal for an electrostatic digitizing pad. The high voltage is obtained by applying a sine wave to one lead of the primary of a transformer, and applying the inverse of the sine wav... | 10/27/1998 |
| 5798667 | Method and apparatus for regulation of power dissipation The clock rate for a device is controlled through the use of integrated circuits which respond to the temperature of the device. Circuitry is added to the integrated circuit device being controlled which changes the clock rate of the device as the device ... | 08/25/1998 |
| 5759877 | Semiconductor fuse structure A semiconductor structure comprising a polysilicon pad, a metal pad separated from the polysilicon pad by an insulator, and a metal via connecting the pads. A fuse is formed at the intersection of the polysilicon pad and via.... | 06/02/1998 |
| 5752010 | Dual-mode graphics controller with preemptive video access A method and architecture for a graphics controller chip. The graphics controller has a display memory for storing video and graphics data. It also has a logic controller, connected to the memory, for performing logic operations on data stored in the memo... | 05/12/1998 |
| 5728626 | Spin-on conductor process for integrated circuits A method of planarizing a non-planar substrate, such as filling vias and contact holes, spreads a suspension of a conducting material suspended in a liquid on a substrate. The suspension includes an organometallic material, preferably with particles of a ... | 03/17/1998 |
| 5726991 | Integral bit error rate test system for serial data communication links A data communication method and apparatus includes an integral bit error rate test system. The system is adapted to receive digital data signals to be transmitted over a communication link and includes a transmitter for transmitting the data signals onto ... | 03/10/1998 |
| 5721954 | Intelligent SCSI-2/DMA processor A SCSI-2-and-DMA processor that has on a single integrated circuit a SCSI-2 interface for a SCSI-2 data bus that is at least two bytes wide and a DMA interface for a system data bus that is at least two bytes wide. This integrated circuit has an set of co... | 02/24/1998 |
| 5701309 | Automated test equipment digital tester expansion apparatus A scan-based logic test apparatus is provided for use with an automated test equipment (ATE) digital tester which tests scan-based logic IC devices. The test apparatus is embodied in a test card which is pluggable into a bus slot within a computer. The co... | 12/23/1997 |
| 5696464 | Output driver adaptable to power supply variation The invention concerns an adaptive driver circuit which can source and sink current when powered by different power supply voltages. The invention maintains the output voltage substantially constant, for a given load, when the voltage of the power supply ... | 12/09/1997 |
| 5680642 | Method and apparatus for pseudo-aligned transfers of data to memory wherein a re-alignment is performed based on the data byte control header A method and apparatus for pseudo aligned transfers to memory for processors, peripherals and memories. Alignment logic, typically coupled to a peripheral, receives a plurality of data bytes from a processor. The alignment logic uses a control header tran... | 10/21/1997 |
| 5677642 | Signal generator with supply voltage tolerance A signal generator and method that is tolerable to supply voltage fluctuations and differentials. A current switch is driven that is independent of the supply voltage. By clamping the slewing voltage at the gate of a transistor driver, the difference betw... | 10/14/1997 |
| 5677564 | Shallow trench isolation in integrated circuits The invention concerns fabrication of oxide-filled isolation trenches in integrated circuits. The invention etches a network of trenches in the surface of a uniformly doped wafer which has experienced no substantial processing steps. Such a wafer will hav... | 10/14/1997 |
| 5675620 | High-frequency phase locked loop circuit A high-frequency phase locked loop circuit effectively increases the maximum frequency associated with the CMOS technology. The circuit includes a first phase-locked loop sub-circuit having an input and an output, a second phase-locked loop sub-circuit ha... | 10/07/1997 |
| 5673404 | End-user customizable feedback display for windowed applications A method for displaying status information during execution of an application task in a windowed application. The method provides two formats for displaying status information for an application task: (1) a detailed display format wherein status informati... | 09/30/1997 |
| 5672981 | Universal power interface adapter for burn-in board A power interface adapter that provides device power connections in a universal burn-in board system. The power interface adapter is a low-cost printed circuit board which interfaces on a one-to-one basis with each burn-in board device socket, thus provid... | 09/30/1997 |
| 5672905 | Semiconductor fuse and method A semiconductor fuse and method for fabricating the same An insulating layer is provided and a trench formed therein. A fusible link is then formed across the insulating layer and trench and conformal therewith. The link has a break region of minimum thic... | 09/30/1997 |
| 5671397 | Sea-of-cells array of transistors The invention concerns integrated circuits in which a MACRO is embedded in a standard cell array. One level of metal is devoted exclusively to non-local interconnect, and a layer of polysilicon is devoted to local interconnect, thereby saving significant ... | 09/23/1997 |
| 5668352 | Data compression in digitizing tablet The invention concerns storage of correction tables for digitizing tablets. A digitizing tablet produces data indicative of position of a stylus. The data does not, in general, exactly indicate the position; errors exist. For example, a tablet may produce... | 09/16/1997 |
| 5665845 | Electronic device with a spin-on glass dielectric layer There is provided electronic devices with dielectric layers obtained from boron-oxide doped, spin-on glass formulations which form glassy layers with high oxygen resistance. Suitable electronic devices include integrated circuits. With high oxygen resista... | 09/09/1997 |
| 5666261 | Honeycomb celled-sheet layer composite panel for monitoring an LCD to a laptop computer A LCD in a laptop computer is resiliently mounted to a light-weight stiff celled composite sandwich panel that protects the LCD against breakage. The composite panel comprises a layer of lightweight preferably aluminum honeycomb celled material that is sa... | 09/09/1997 |
| 5644336 | Mixed format video ram The invention concerns the simultaneous display of video data and text data on a computer display. The invention stores both types of data in display memory. Transition codes mark the separation between the two types. The invention converts each type of d... | 07/01/1997 |
| 5644786 | Method for scheduling the execution of disk I/O operations A procedure for scheduling multiple process requests for read/write access to a disk memory device within a computer system. The procedure considers disk characteristics, such as the number of sectors per track, the number of tracks per cylinder, speed of... | 07/01/1997 |
| 5644767 | Method and apparatus for determining and maintaining drive status from codes written to disk drives of an arrayed storage subsystem A method whereby a host computer system is informed of the drive status in a disk array when one or more of the disk drives fail. A data pattern (timestamp or status code) is written on each of the disk drives in service in the array when an event occurs ... | 07/01/1997 |
| 5634033 | Disk array storage system architecture for parity operations simultaneous with other data operations A high performance scaleable hardware architecture for a disk array storage subsystem which supports RAID modes 0, 3, 4 and 5. The architecture features a high bandwidth parity calculation engine, a buffered PCI interface operating at the full speed of th... | 05/27/1997 |
| 5625405 | Architectural arrangement for a video server A Video-On-Demand (VOD) system including a plurality of video storage devices; an asynchronous transfer mode (ATM) telephony technology network connected to provide video data to a plurality of subscribers; and a unique video server coordinating the conve... | 04/29/1997 |
| 5619620 | Neural network for banknote recognition and authentication A probabilistic neural network (PNN) comprises a layer L1 of input nodes, a layer L2 of exemplar nodes, a layer L3 of primary Parzen nodes, a layer L4 of sum nodes, and optionally a layer L5 of output nodes. Each exemplar node determines the degree of mat... | 04/08/1997 |
| 5616943 | Electrostatic discharge protection system for mixed voltage application specific integrated circuit design An ESD protection system that makes use of several different types of over-voltage protection devices provides ESD conduction paths between different power lines. For example, the system may employ shunt diodes between the ground lines of the different po... | 04/01/1997 |
| 5617102 | Communications transceiver using an adaptive directional antenna A directional antenna connected to a portable communications transceiver is adaptively directed towards a remote station in a communication system. The amount of RF power required by the portable device is significantly reduced, relative to a non-directio... | 04/01/1997 |
| 5610429 | Differential analog transistors constructed from digital transistors The invention concerns approaches to interconnecting individual field-effect transistors (FETs) in integrated circuits (ICs), in order to provide a larger, composite transistor. In one approach, the individual FETs are positioned symmetrically about centr... | 03/11/1997 |
| 5608390 | Synchronous telemetry channel The invention concerns pen-based computers, wherein a pen, or stylus, is positioned on a display of the computer, and produces a signal which allows the computer to detect the position of the stylus. The stylus produces a second signal, which is used as a... | 03/04/1997 |
| 5608273 | Battery back-up for electronic circuits The invention concerns battery back-up for electronic equipment. A sensor detects a drop in power supply voltage and, in response, connects the back-up battery to the equipment, via a Field-Effect Transistor (FET). The FET causes a lower voltage drop betw... | 03/04/1997 |
| 5604923 | Electronic display system capable of displaying communication signal strength on individual electronic display modules and method of using the same Electronic display system capable of displaying communication signal strength on individual electronic display modules and method of using the same. In one preferred embodiment of the present invention, a pseudo-price change command is transmitted by a ba... | 02/18/1997 |
| 5604341 | ATM as video conferencing station The invention concerns using Automated Teller Machines as video conferencing stations. In a video conference, two parties can both see, and speak with, each other. The invention allows a user of an ATM to hold a video conference not only with the financia... | 02/18/1997 |
| 5600539 | Secure interface card extractor/ejector mechanism A drawer slide which is capable of moving in and out of the housing of a computer or other electronic apparatus is configured to receive an interface card which is connected into the circuitry of the computer when the drawer slide is in a fully inserted p... | 02/04/1997 |
| 5600217 | CMOS disk drive motor control circuit having back-EMF regulator circuitry A CMOS disk drive motor control circuit which has back-EMF regulator circuitry which prevents the back-EMF from the disk drive motor from exceeding a predetermined level. The back-EMF provides an alternate power source for parking the read/write head when... | 02/04/1997 |
