Did You Know...
...that Thomas Edison's patent application on his phonograph was approved by the Patent Office in just seven weeks? In contrast, it took Gordon Gould, the inventor of the laser, 30 years to obtain his patent -- finally awarded in 1988!
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| Number | Title | Issue Date |
| 8169242 | Programmable fine lock/unlock detection circuit An integrated circuit includes a feedback controlled clock generating circuit, such as a DLL, PLL or other suitable circuit, that is operative to provide a feedback reference frequency signal based on a generated output clock signal. The integrated circuit also incl... | 05/01/2012 |
| 8159505 | System and method for efficient digital video composition An efficient method of compositing planes onto a target surface using a computing device with graphics processing capability is disclosed. The method includes partitioning the target surface, on which planes are composited, into partitions. Each one of the partition... | 04/17/2012 |
| 8156317 | Integrated circuit with secure boot from a debug access port and method therefor An integrated circuit (100) may receive a boot loader code (114) via a debug access port (105), wherein a boot logic is operative to block, upon a reset (123) of the programmable processor (103) from the debug access port (105 | 04/10/2012 |
| 8156276 | Method and apparatus for data transfer A method and apparatus for data transfer includes receiving a first data packet across a first bi-directional bus and receiving a second data packet across a second bi-directional bus. Next, the first data packet is written to a first register operably coupled to th... | 04/10/2012 |
| 8144064 | Physically small tunable narrow band antenna A narrow band, tunable antenna uses a series of small inductors wired in series to produce different resonant frequencies from a single antenna across a wide frequency spectrum. Radio Frequency (RF) switches are positioned in parallel with the inductors and are capa... | 03/27/2012 |
| 8137127 | Electronic devices using divided multi-connector element differential bus connector In one example an electronic device includes a housing that includes an A/C input or DC input, and at least one circuit substrate that includes electronic circuitry, such as graphics processing circuitry that receives power based on the A/C input or DC input. The el... | 03/20/2012 |
| 8127121 | Apparatus for executing programs for a first computer architechture on a computer of a second architechture Executing programs coded in an instruction set of a first computer on a computer of a second, different architecture. An operating system maintains an association between each one of a set of concurrent threads and a set of computer resources of the thread's context... | 02/28/2012 |
| 8121828 | Detecting conditions for transfer of execution from one computer instruction stream to another and executing transfer on satisfaction of the conditions A computer has instruction pipeline circuitry capable of executing two instruction set architectures (ISA's). A binary translator translates at least a selected portion of a computer program from a lower-performance one of the ISA's to a higher-performance one of th... | 02/21/2012 |
| 8120406 | Sequential circuit with dynamic pulse width control A pulsed latch circuit with conditional shutoff prevents an input node, such as a node receiving data, of the pulsed latch circuit, from latching data based on a delayed input control signal, such as an internal clocking signal, and based on a feedback latch state t... | 02/21/2012 |
| 8120170 | Integrated package circuit with stiffener An integrated circuit package employs a stiffener layer that houses a passive electronic component to maintain mechanical properties when a thinner substrate is used. The use of either a retention wall or a stiffener allows for the manufacture of these integrated ci... | 02/21/2012 |
| 8111928 | Method and apparatus for compression of multi-sampled anti-aliasing color data The present invention provides a scheme for compressing the color components of image data, and in particular, data used in multi-sampled anti-aliasing applications. Adjacent pixels are grouped into rectangular tiles, with the sample colors stored in compressed form... | 02/07/2012 |
| 8111264 | Method of and system for non-uniform image enhancement Methods of rendering a view of a scene include steps that specify quality levels of anti-aliasing and texture filtering for predetermined regions of a display, or selected objects within the scene, or both. Methods of processing data for display include steps adapte... | 02/07/2012 |
| 8106804 | Video decoder with reduced power consumption and method thereof A video decoder (10) with reduced power consumption includes a power management controller (45) that is operative to select one of a plurality of different power consumption states for a video decoder (10), and, in response to the determination,... | 01/31/2012 |
| 8102398 | Dynamically controlled power reduction method and circuit for a graphics processor A graphics processor may be operated in a reduced power mode to render frames at rate equal to or less than the rate at which frames are presented on an interconnected display. Graphics processor clock speeds are controlled to reduce the time during which the graphi... | 01/24/2012 |
| 8099638 | Apparatus and methods for tuning a memory interface The disclosure relates to a programmable virtual memory client, that includes programmable control logic configured to generate at least one data pattern sequence from a number of stored data patterns. Additionally, the virtual memory client includes virtual memory ... | 01/17/2012 |
| 8090969 | Method and apparatus for managing power consumption relating to a differential serial communication link A circuit includes a primary transceiver, a secondary transceiver, and control logic. The primary transceiver communicates information via a primary communication link. The secondary transceiver communicates information via a secondary communication link. The contro... | 01/03/2012 |
| 8086055 | Variable-length code decoder An apparatus includes at least one general purpose register and at least one special purpose register and an execution unit that executes at least two instructions in parallel, to decode variable length codes, wherein each of the instructions share use of the at lea... | 12/27/2011 |
| 8086043 | System and method of image correlation based on image structure A method and apparatus that augments the traditional Phase Plane Correlation (PPC) approach incorporates image structure into the correlation process. In so doing, the energy in spurious peaks that can occur in the phase plane correlation surface are dramatically re... | 12/27/2011 |
| 8085065 | Dual loop level shifter A method and apparatus are disclosed to control one or more input output (I/O) pads. An input signal is translated to an output signal having a desired logic level using a first latch loop. The state of the first latch loop is maintained by a second latch loop, inte... | 12/27/2011 |
| 8074055 | Altering data storage conventions of a processor when execution flows from first architecture code to second architecture code A computer. A processor pipeline alternately executes instructions coded for first and second different computer architectures or coded to implement first and second different processing conventions. A memory stores instructions for execution by the processor pipeli... | 12/06/2011 |
| 8072461 | Multi-thread graphics processing system A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a command thread from either the p... | 12/06/2011 |
| 8051345 | Method and apparatus for securing digital information on an integrated circuit during test operating modes The embodiments protect an IC against Design-For-Test (DFT) or other test mode attack. Transitory secrets are secured whether stored in registers or latches, RAM, and/or permanent secrets stored in ROM and/or PROM. One embodiment for securing information on an IC in... | 11/01/2011 |
| 8037370 | Data transmission apparatus with information skew and redundant control information and method Apparatus and methods provide at least redundant control information such as control symbols and control data over respective channels, such as differential lanes, and skew at least the redundant control information in time between the plurality of transmission circ... | 10/11/2011 |
| 8031538 | Method and apparatus for data inversion in memory device The present invention is a method of writing information to a synchronous memory device by examining a present word of N bits to be written, where each bit has a high or low value. The present word is compared to a previous word also having N bits to identify the nu... | 10/04/2011 |
| 8031093 | Reduced component digital to analog decoder and method An n bit D/A decoder is formed using P-type and N-type transistor switches, instead of convention CMOS switches. Each P-type and N-type switch may be formed of fewer transistors than those used to form a CMOS switch, thereby reducing the overall transistor count. Th... | 10/04/2011 |
| 8024767 | Method and apparatus for receiving digital video signals A method and apparatus for storing a compressed video stream or an uncompressed video stream is disclosed. The uncompressed video stream may be ZOOM VIDEO data. The compressed video stream may be a TRANSPORT STREAM data from a High Definition Television (HDTV) broad... | 09/20/2011 |
| 8024584 | Remote connection system capable of generating a wake-up command and method thereof A remote connection system capable of generating a wake-up command and method thereof include a remote connector with a power supply input receiver capable of being connected to a power source and further capable of receiving a power supply for the purpose of poweri... | 09/20/2011 |
| 8022956 | Settings control in devices comprising at least two graphics processors In a device comprising at least two graphics processors, a determination is made that the device has switched from a first or current graphics processor to a second or target graphics processor. At least a portion of settings corresponding to the first graphics proc... | 09/20/2011 |
| 8015419 | Method and apparatus for soft start power gating with automatic voltage level detection A method and apparatus for selectively charging a secondary voltage rail includes selectively and partially charging a secondary voltage rail using at least one soft start power gate switch and using an initial power control indicator. The partially charged secondar... | 09/06/2011 |
| 8004617 | Stand-by mode transitioning A device for rapidly instituting an active mode of a digital-television enabled system, the system including a first, volatile memory configured to load and store software instructions, includes: an input configured to receive first digital audio and video informati... | 08/23/2011 |
| 7996863 | Method and apparatus for display of a digital video signal A method and apparatus for display of a digital video signal includes a demodulator capable of receiving a major channel of the digital video signal. The major channel of the digital video signal includes one or more minor channels, wherein the minor channels are sp... | 08/09/2011 |
| 7996591 | Computing device with flexibly configurable expansion slots and method of operation A computing device that allows for a flexible allocation of bandwidth among peripheral devices using a peripheral bus is disclosed. The computing device includes a peripheral bus and at least two slots. The computing device may be used with a single peripheral card ... | 08/09/2011 |
| 7986580 | Self-refresh based power saving circuit and method A circuit includes a memory interface control circuit and a self-refresh adjustable impedance driver circuit having at least one adjustable impedance circuit. The memory interface control circuit selectively provides an impedance control signal based on memory self-... | 07/26/2011 |
| 7985621 | Method and apparatus for making semiconductor packages A method of packaging a plurality of semiconductor chips comprises: providing a substrate panel having a first coefficient of thermal expansion (CTE); providing a carrier having a second CTE that is less than the first CTE; heating the substrate panel and the carrie... | 07/26/2011 |
| 7978194 | Method and apparatus for hierarchical Z buffering and stenciling A method and apparatus for hierarchical Z buffering stenciling includes comparing an input tile Z value range with a hierarchical Z value range and a stencil code. The method and apparatus also updates the hierarchical Z value range and stencil code in response the ... | 07/12/2011 |
| 7974096 | Three-dimensional thermal spreading in an air-cooled thermal device The present disclosure relates to heat transfer thermal management device utilizing varied methods of heat transfer to cool a heat generating component from a circuit assembly or any other embodiment where a heat generating component can be functionally and operativ... | 07/05/2011 |
| 7965511 | Cross-flow thermal management device and method of manufacture thereof The present disclosure relates to heat transfer thermal management device utilizing varied methods of heat transfer to cool a heat generating component from a circuit assembly or any other embodiment where a heat generating component can be functionally and operativ... | 06/21/2011 |
| 7964951 | Multi-die semiconductor package with heat spreader A semiconductor device includes first and second stacked semiconductor dies on a substrate. A lid having a plurality of fins extending downwardly into the cavity is mounted on the substrate to encapsulate the semiconductor dies. At least some of the fins are longer ... | 06/21/2011 |
| 7958376 | Write once system and method for facilitating digital encrypted transmissions A digital interface device is provided for facilitating key encryption of a digital signal which is communicated from a computer system to an associated peripheral device, such as a digital display device. The digital interface device has a digital output, digital o... | 06/07/2011 |
| 7953906 | Multiple interrupt handling method, devices and software A device, method and software for handling multiple interrupts in a peripheral device are disclosed. The disclosed method includes, upon a hardware event in the peripheral device recording the hardware event and determining an acceptable period before which an inter... | 05/31/2011 |
