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Assignee: ASAT Ltd.


Location: Tsuen Wan, New Territories, HK
No. of patents: 18

NumberTitleIssue Date
7482690Electronic components such as thin array plastic packages and process for fabricating same
A process for fabricating an integrated circuit package includes establishing a plating mask on a first surface of a metal carrier. The plating mask defines a plurality of components including a die attach pad, at least one row of contact pads and at least one addit...
01/27/2009
7449771Multiple leadframe laminated IC package
A method of fabricating an integrated circuit package. The method includes providing a first leadframe and a second leadframe, laminating the second leadframe to a portion of the first leadframe in order to create a multi-layer laminated leadframe, and mounting a se...
11/11/2008
7439099Thin ball grid array package
An integrated circuit package is provided. The package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween. The substrate further has a cavity therein and a heat slug is fixed to the substrate and spans the cavity....
10/21/2008
7411289Integrated circuit package with partially exposed contact pads and process for fabricating the same
A process for fabricating an integrated circuit package includes: selectively etching a leadframe strip to define a die attach pad and at least one row of contact pads; mounting a semiconductor die to one side of the leadframe strip, on the die attach pad; wire bond...
08/12/2008
7410830Leadless plastic chip carrier and method of fabricating same
A process for fabricating a leadless plastic chip carrier includes providing a leadframe including a plurality of contacts circumscribing a void; fixing a heat sink to the contacts of the leadframe using an intermediate non-electrically conductive adhesive such that...
08/12/2008
7381588Shielded integrated circuit package
An integrated circuit package is provided. The package includes a die attach pad having a first side and a second side. A first semiconductor die is mounted to the first side of the die attach pad, a plurality of contact pads disposed in close proximity to the first...
06/03/2008
7372151Ball grid array package and process for manufacturing same
A process for manufacturing an integrated circuit package includes forming a plurality of solder balls on a first surface of a substrate and mounting a semiconductor die to the substrate such that bumps of the semiconductor die are electrically connected to conducti...
05/13/2008
7371610Process for fabricating an integrated circuit package with reduced mold warping
A process for fabricating an integrated circuit package includes mounting a semiconductor die on a first surface of a metal carrier and forming electrical connections between the semiconductor die and ones of a plurality of contacts on the metal carrier. Next, using...
05/13/2008
7358119Thin array plastic package without die attach pad and process for fabricating the same
A process for fabricating an integrated circuit package. Metal is plated up on a substrate to provide a plurality of contact pads and a plurality of fiducial markings on a periphery of the contacts. A transparent mask is selectively deposited on the substrate, over ...
04/15/2008
7348663Integrated circuit package and method for fabricating same
A process for fabricating an integrated circuit package includes: selectively etching a first side of a substrate thereby providing etched regions of the substrate to partially define at least a plurality of contact pads; adding a dielectric material to the etched r...
03/25/2008
7344920Integrated circuit package and method for fabricating same
A process for fabricating an integrated circuit package includes: selectively etching a first side of a substrate thereby providing etched regions of the substrate to partially define at least a plurality of contact pads; adding a dielectric material to the etched r...
03/18/2008
7342305Thermally enhanced cavity-down integrated circuit package
A cavity-down ball grid includes a flexible circuit tape including a flexible tape laminated to a conductor layer. The flexible circuit tape has an aperture therein. A thermally conductive heat spreader is fixed to a first surface of the flexible circuit tape and th...
03/11/2008
7315080Ball grid array package that includes a collapsible spacer for separating die adapter from a heat spreader
A ball grid array package is manufactured by mounting a semiconductor die to a first surface of a substrate and mounting a die adapter to the semiconductor die. The semiconductor die is wire bonded to ones of conductive traces of the substrate. A collapsible spacer ...
01/01/2008
7270867Leadless plastic chip carrier
A process for fabricating a leadless plastic chip carrier includes selectively depositing a plurality of base layers on a first surface of a base of a leadframe strip to at least partially define a die attach pad and at least one row of contact pads. At least one fu...
09/18/2007
7247526Process for fabricating an integrated circuit package
A process for fabricating an integrated circuit package. At least a first side of a leadframe strip is selectively etched to define portions of a die attach pad and at least one row of contacts adjacent the die attach pad. A carrier strip is laminated to the first s...
07/24/2007
7232755Process for fabricating pad frame and integrated circuit package
A process for fabricating a pad frame for an integrated circuit package includes building up metal on selective portions of a first side of a substrate to define a plurality of contact pads disposed in a first layer of dielectric material, depositing a metal seed la...
06/19/2007
7226811Process for fabricating a leadless plastic chip carrier
A process for fabricating a leadless plastic chip carrier includes laminating a first metal strip to a second metal strip to form a leadframe strip, selectively etching the first metal strip to define at least a row of contact pads, mounting a semiconductor die to e...
06/05/2007
7224048Flip chip ball grid array package
A flip-chip ball grid array integrated circuit package with improved thermo-mechanical properties is provided. The package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween. A semiconductor die is flip-chip mount...
05/29/2007
 
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