Ballistic resistant body covering
A ballistic resistant body covering for protecting the torso, groin and neck area from ballistic missiles.
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| Application No. | Application Title | Issue Date |
| 20080303458 | ENHANCEMENT OF THE EFFICIENCY OF ENERGY RECOVERY DURING SPINDLE MOTOR STEP-UP PHASES FOR PARKING THE R/W HEAD OF A DISK STORAGE DEVICE UPON EXTERNAL SUPPLY FAILURE Energy recovery during recirculation phases of the phase windings of a multiphase spindle motor is increased when all the MOSFETs of the output bridge stage associated therewith are turned off (tristated) for charging a hold capacitor. This is accomplished by allowing t... | 12/11/2008 |
| 20080299437 | POLYELECTROLYTE MEMBRANE FOR ELECTROCHEMICAL APPLICATIONS, IN PARTICULAR FOR FUEL CELLS A polyelectrolyte membrane may include at least one styrene polymer or copolymer having a syndiotactic configuration and having sulfonic groups. The at least one styrene polymer or copolymer may be made in the form of a film in clathrate form. The film may include less ... | 12/04/2008 |
| 20080294871 | MULTIDIMENSIONAL PROCESSOR ARCHITECTURE A processor architecture includes a number of processing elements for treating input signals. The architecture is organized according to a matrix including rows and columns, the columns of which each include at least one microprocessor block having a computational part ... | 11/27/2008 |
| 20080285680 | Reconfigurable Alamouti/ABBA decoder circuit, system, and method A decoder apparatus for decoding a first input set of demodulated data elements obtained by demodulating transmitted data elements received over a transmission channel so as to obtain a corresponding output set of decoded data elements. The decoder apparatus includes a ... | 11/20/2008 |
| 20080284518 | OVERDRIVE CONTROL SYSTEM An overdrive control system includes a voltage controlled current source to deliver a compensation current, and being between a first voltage reference and an internal node, which is connected to an output terminal. The voltage controlled current source has a control te... | 11/20/2008 |
| 20080263302 | Non-volatile memory circuit, system, and method A non volatile memory device includes a first buffer register configured to receive and store the data to be stored into the memory device provided via a memory bus. A command window is activatable for interposing itself for access to a memory matrix between the first b... | 10/23/2008 |
| 20080263557 | SCHEDULING METHOD AND SYSTEM, CORRESPONDING COMPUTATIONAL GRID AND COMPUTER PROGRAM PRODUCT A scheduler device schedules executions of jobs using resources of a computational grid. The scheduler is configured for identifying an equilibrium threshold between resources and jobs. Below the equilibrium threshold, the scheduler schedules the execution of the jobs u... | 10/23/2008 |
| 20080256407 | PROCESS AND SYSTEM FOR THE VERIFICATION OF CORRECT FUNCTIONING OF AN ON-CHIP MEMORY A method is for making an integrated circuit with built-in self-test. The method includes forming at least one nonvolatile read only memory (ROM) to store ROM code and forming a logic self-test circuit to verify a correct functioning of the at least one nonvolatile ROM.... | 10/16/2008 |
| 20080239769 | DEVICE FOR TRANSFORMING A PRIMARY AC VOLTAGE IN A LOWER AC VOLTAGE FOR SUPPLYING AN ELECTRICAL LOAD A device for transforming an AC voltage to a lower AC voltage includes a generator of a PWM control signal and a first bidirectional switch to couple a load to the AC voltage during a conduction-phase. A second bidirectional switch discharges energy from the load during... | 10/02/2008 |
| 20080211580 | LOW NOISE AC DIFFERENTIAL AMPLIFIER WITH REDUCED LOW CORNER FREQUENCY AND CURRENT CONSUMPTION An integrated amplifier may include a transconductance stage including a differential pair of input transistors of a first type of conductivity, respective resistive loads coupled to said input transistors, and a first bias circuit coupled to the input transistors. The ... | 09/04/2008 |
| 20080180095 | METHOD AND RELATED DEVICE FOR ESTIMATING THE CURRENTS FLOWING IN WINDINGS OF A POLY-PHASE ELECTRICAL LOAD AT A CERTAIN INSTANT There is a method of estimating values of winding currents, at an instant of a period, in a winding of a load, controlled in space vector modulation mode through symmetrical control phases. The winding is cyclically coupled between two supply lines through respective sw... | 07/31/2008 |
| 20080180046 | METHOD AND DEVICE FOR ESTIMATING THE ANGULAR POSITION OF THE ROTOR OF A BRUSHLESS MOTOR A method is for estimating an angular position of a rotor of a motor having position sensors along the circumference of a stator and generating digital signals that switch each time the rotor crosses certain angular positions. The method includes storing rotor angular p... | 07/31/2008 |
| 20080174363 | OUTPUT STAGE FOR ELECTRONIC DEVICES INTEGRATED ON A SEMICONDUCTOR SUBSTRATE, IN PARTICULAR FOR HIGH FREQUENCY APPLICATIONS AND CORRESPONDING METHOD An output stage may include an input terminal receiving an input signal, an output terminal coupled to an external load, and a pre-buffer coupled to the input terminal and including an enable terminal receiving a general enable signal and a first output terminal for sup... | 07/24/2008 |
| 20080174378 | METHOD OF ADJUSTING THE RESONANCE FREQUENCY OF AN L-C RESONANT CIRCUIT AND RESONANT CIRCUIT An L-C resonant circuit with an adjustable resonance frequency, having a capacitor and a first inductor electrically coupled together and a second inductor magnetically coupled to the first inductor. Additionally, there is a control circuit to sense a signal representin... | 07/24/2008 |
| 20080169780 | METHOD AND DEVICE FOR DETERMINING THE DUTY-CYCLES OF PWM CONTROL SIGNALS OF AN INVERTER A method for determining duty-cycles of respective pulse width modulated (PWM), space vector modulated (SVM) control signals of an inverter, may include storing values of the duty-cycles as a function of a position of the multi-phase electric load in a look-up table. Th... | 07/17/2008 |
| 20080164543 | Package, in particular for MEMS devices and method of making same A package includes a substrate provided with a passing opening and a MEMS device. The MEMS device includes an active surface wherein a portion of the MEMS device is integrated sensitive to the chemical/physical variations of a fluid. The active surface of the MEMS devic... | 07/10/2008 |
| 20080130181 | Electric circuit with protection against overvoltages An electric circuit includes a supply terminal to receive an outer supply voltage and a voltage regulator coupled to the supply terminal and to provide supply and resting voltages. A lock-out circuit is switchable between active and inactive states and receives the supp... | 06/05/2008 |
| 20080107336 | METHOD AND DEVICE FOR EXTRACTING A SUBSET OF DATA FROM A SET OF DATA A method for extracting a subset of data from an ordered set of bi-dimensional matrices (data arrays) such as a sequence of pictures or a multi-dimensional matrix, for instance, is implemented by dedicated hardware that may be used each time it is necessary to extract a... | 05/08/2008 |
| 20080065823 | METHOD OF TRANSFERRING DATA IN AN ELECTRICALLY PROGRAMMABLE MEMORY A method is provided for transferring data in a memory that includes memory cells forming memory pages, and a page buffer that includes a register, with signal lines selectively transferring data stored in the register to the memory cells of a selected one of the memory... | 03/13/2008 |
| 20080062767 | METHOD OF FIXING A READ EVALUATION TIME OR THE DIFFERENCE BETWEEN A READ CHARGE VOLTAGE AND A READ DISCRIMINATING VOLTAGE IN A NON-VOLATILE NAND TYPE MEMORY DEVICE The evaluation time or the difference between the read charge voltage and the read discrimination voltage of the programmed or erased state of a cell of a NAND memory array is set for the individual memory device. This is done in such a way that at least partially compe... | 03/13/2008 |
| 20080049542 | ADDRESS COUNTER FOR NONVOLATILE MEMORY DEVICE An address counter for a nonvolatile memory device includes a cascade of cells. Each cell includes an address counting flip-flop that is updated to a value of every newly counted address bit, or latches a column address bit value input by an external user of the memory ... | 02/28/2008 |
| 20080049514 | MEMORY DEVICE WITH A MANAGING MICROPROCESSOR SYSTEM AND AN ARCHITECTURE OF FAIL SEARCH AND AUTOMATIC REDUNDANCY An automatic redundancy system may exploit an existing microprocessor management system on chip for carrying out autonomously, without communicating with an external testing machine, the operations of: writing data in the memory array according to one or more pre-establ... | 02/28/2008 |
| 20080048743 | POWER ON RESET CIRCUIT FOR A DIGITAL DEVICE INCLUDING AN ON-CHIP VOLTAGE DOWN CONVERTER A power on reset circuit initializes at power on a digital integrated circuit, and includes a first power on reset signal generator powered by an external power supply voltage and generates a first power on reset signal. A reference voltage generator is powered by the e... | 02/28/2008 |
| 20080042720 | METHOD FOR DYNAMICALLY TUNING THE CLOCK FREQUENCY OF AN OSCILLATOR AND CORRESPONDING OSCILLATING SYSTEM An oscillator system may include an oscillator block having a plurality of inputs and outputting a clock signal, a frequency divider block receiving the clock signal and outputting a divided clock signal, a tuning block receiving the divided clock signal and outputting ... | 02/21/2008 |
| 20080036030 | Process for manufacturing a wafer by annealing of buried channels A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures. ... | 02/14/2008 |
| 20080036641 | ANALOG DIGITAL CONVERTER An analog/digital converter for converting an analog signal to a digital output code includes a local digital analog converter including a segmented array. The segmented array includes upper and lower segments of conversion elements selectively operable by respective di... | 02/14/2008 |
| 20080016317 | METHOD AND ARRANGEMENT FOR CACHE MEMORY MANAGEMENT, RELATED PROCESSOR ARCHITECTURE A data cache memory coupled to a processor including processor clusters are adapted to operate simultaneously on scalar and vectorial data by providing data locations in the data cache memory for storing data for processing. The data locations are accessed either in a s... | 01/17/2008 |
| 20080012621 | ENHANCEMENT OF POWER ON RELIABILITY IN A DUAL POWER SUPPLY DIGITAL DEVICE WITH DOWN CONVERTER A dual power supply digital device includes a down converter for converting an externally applied supply voltage to a regulated first supply voltage for powering a core part of the logic circuitry of the digital device. A second supply voltage source provides a second s... | 01/17/2008 |
| 20080016319 | PROCESSOR ARCHITECTURE, FOR INSTANCE FOR MULTIMEDIA APPLICATIONS A processor architecture for multimedia applications includes processor clusters providing vectorial data processing capability. Processing elements in the processor clusters process both data with a bit length N and data with bit lengths N/2, N/4, and so on according t... | 01/17/2008 |
| 20080001592 | METHOD FOR GENERATING A REFERENCE CURRENT AND A RELATED FEEDBACK GENERATOR A feedback generator of a reference current may include a differential amplifier having a first input for a reference voltage, and a second input for a feedback voltage and generating an output voltage. The feedback generator may also include a first conduction path inc... | 01/03/2008 |
| 20070297228 | NONVOLATILE MEMORY DEVICE A nonvolatile memory device implements a program routine followed by a program-verify routine when recording or modifying stored data. The nonvolatile memory device may include an array of memory cells for storing data, a sense node, and a gating circuit for selectively... | 12/27/2007 |
| 20070290759 | ANALOG TRANSCONDUCTANCE AMPLIFIER An analog transconductance amplifier includes an input stage including a first transistor and a second transistor connected in series to the first transistor. The first and second transistors are connected between positive and negative voltages and are respectively cont... | 12/20/2007 |
| 20070287290 | MANUFACTURING METHOD FOR NON-ACTIVE ELECTRICALLY STRUCTURES OF AN INTEGRATED ELECTRONIC CIRCUIT FORMED ON A SEMICONDUCTOR SUBSTRATE AND CORRESPONDING ELECTRONIC CIRCUIT Electrically non-active structures are formed for an electronic circuit to make uniform a surface above a semiconductor substrate. The electronic circuit includes first electrically active structures comprising conductive elements of a first height projecting from the s... | 12/13/2007 |
| 20070285430 | GRAPHIC SYSTEM COMPRISING A PIPELINED GRAPHIC ENGINE, PIPELINING METHOD AND COMPUTER PROGRAM PRODUCT A graphic system includes a pipelined graphic engine for generating image frames for display. The pipelined graphic engine includes a geometric processing stage for performing motion extraction, and a rendering stage for generating full image frames at a first frame rat... | 12/13/2007 |
| 20070283200 | SCAN COMPRESSION ARCHITECTURE FOR A DESIGN FOR TESTABILITY COMPILER USED IN SYSTEM-ON-CHIP SOFTWARE DESIGN TOOLS A scan compression architecture for a design for testability compiler used in system-on-chip software design tools includes a first scan architecture including a first scan compressor/decompressor configuration connected to a first predetermined set of pins, and a secon... | 12/06/2007 |
| 20070279500 | METHOD FOR CORRECTING A DIGITAL IMAGE A luminance intensity of pixels of an input digital image is corrected for generating a corrected digital image. A luminance of each pixel is calculated as a function of the luminance of a corresponding pixel in an original image according to a parametric function. A ma... | 12/06/2007 |
| 20070273448 | OUTPUT POWER CONTROL OF AN RF AMPLIFIER Precision and reliability of a current limited mode output power control of an RF amplifier is enhanced by sensing the base current of the current controlled output power transistor. The base current is compared to a control current that is normalized by scaling it as a... | 11/29/2007 |
| 20070242520 | VOLTAGE REGULATOR HAVING A LOW NOISE DISCHARGE SWITCH FOR NON-VOLATILE MEMORIES, IN PARTICULAR FOR DISCHARGING WORD LINES FROM NEGATIVE VOLTAGES A voltage regulator with a low noise discharge switch is used in non-volatile memory electronic devices, such as for discharging word lines from negative voltage potentials. The voltage regulator includes a first circuit portion with transistors for transforming a first... | 10/18/2007 |
| 20070241741 | METHOD AND DEVICE FOR ESTIMATING VARIATIONS OF THE POSITION OF THE ROTOR OF AN ELECTRIC MOTOR A method estimates variations of position of the rotor of a motor having a plurality of uniformly spaced sensors that generate a position pulse at every rotation by a pre-established angle of the rotor. The method may include generating a first clock signal at a first f... | 10/18/2007 |
| 20070229155 | FEEDBACK AMPLIFIER A feedback architecture for a PWM switching audio amplifier is, capable of compensating the effects of the demodulation filter through at least two feedback paths of the voltage applied to a load without degrading the overall loop gain of the device. Each of the feedbac... | 10/04/2007 |