Quotables
"Radio has no future."
Lord Kelvin, British mathematician and physicist ; 1897
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Application No. | Application Title | Issue Date |
| 20120110272 | CROSS PROCESS MEMORY MANAGEMENT A method for efficiently managing memory resources in a computer system having a graphics processing unit that runs several processes simultaneously on the same computer system includes using threads to communicate that additional memory is needed. If the request indica... | 05/03/2012 |
| 20120110242 | PROGRAMMABLE MEMORY CONTROLLER A memory controller, in one embodiment, includes a command translation data structure, a front end and a back end. The command translation data structure maps command operations to primitives, wherein the primitives are decomposed from command operations determined for ... | 05/03/2012 |
| 20120084334 | DATA DECOMPRESSION WITH EXTRA PRECISION Methods and systems for decompressing data are described. The relative magnitudes of a first value and a second value are compared. The first value and the second value represent respective endpoints of a range of values. The first value and the second value each have N... | 04/05/2012 |
| 20120084048 | SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR DETERMINING ONE OR MORE CONTACT POINTS BETWEEN A PAIR OF OBJECTS A system, method, and computer program product are provided for determining one or more contact points between a pair of objects. In operation, a first contact normal is identified between a pair of objects at a first position. Additionally, a relative velocity of the p... | 04/05/2012 |
| 20120038643 | SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR DETERMINISTICALLY SIMULATING LIGHT TRANSPORT A system, method, and computer program product are provided for deterministically simulating light transport. In use, all pairs of non-negative integers are enumerated (e.g. in a predetermined order). Additionally, for each of the enumerated pairs of non-negative intege... | 02/16/2012 |
| 20120038624 | SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR ACTIVATING A BACKLIGHT OF A DISPLAY DEVICE DISPLAYING STEREOSCOPIC DISPLAY CONTENT A system, method, and computer program product are provided for activating a backlight of a display device displaying stereoscopic content. In use, a state of a display device is identified in which an entirety of an image of stereoscopic display content intended for vi... | 02/16/2012 |
| 20120026175 | HIERARCHICAL PROCESSOR ARRAY Apparatuses and methods are presented for a hierarchical processor. The processor comprises, at a first level of hierarchy, a plurality of similarly structured first level components, wherein each of the plurality of similarly structured first level components includes ... | 02/02/2012 |
| 20120026171 | PARALLEL ARRAY ARCHITECTURE FOR A GRAPHICS PROCESSOR A parallel array architecture for a graphics processor includes a multithreaded core array including a plurality of processing clusters, each processing cluster including at least one processing core operable to execute a pixel shader program that generates pixel data f... | 02/02/2012 |
| 20110279473 | TRANSLATION OF REGISTER-COMBINER STATE INTO SHADER MICROCODE An apparatus and method for translating fixed function state into a shader program. Fixed function state is received and stored and when a new shader program is detected the fixed function state is translated into shader program instructions. Registers specified by the ... | 11/17/2011 |
| 20120017048 | INTER-FRAME TEXEL CACHE Methods, apparatuses, and systems are presented for caching. A cache memory area may be used for storing data from memory locations in an original memory area. The cache memory area may be used in conjunction with a repeatedly updated record of storage associated with t... | 01/19/2012 |
| 20110307837 | REGION OF INTEREST TRACKING FOR FLUID SIMULATION A method of simulation comprises controlling an avatar in an environment. Movement of graphical elements is simulated in a fluid coordinate frame surrounding said avatar, wherein said graphical elements in said fluid coordinate frame obey a first rule set. Said graphica... | 12/15/2011 |
| 20110302385 | MEMORY DEVICE SYNCHRONIZATION A memory controller includes first and second output modules for driving first and second data, respectively, to be written to a memory device. The memory controller also includes a clock module for providing an internal clock signal and a timing control module for prod... | 12/08/2011 |
| 20110292065 | RECONFIGURABLE DUAL TEXTURE PIPELINE WITH SHARED TEXTURE CACHE Circuits, methods, and apparatus that provide texture caches and related circuits that store and retrieve texels in an efficient manner. One such texture circuit can provide a configurable number of texel quads for a configurable number of pixels. For bilinear filtering... | 12/01/2011 |
| 20110291748 | POWER CONSUMPTION REDUCTION SYSTEMS AND METHODS Power management systems and methods that facilitate efficient and effective power conservation are presented. In one embodiment a power management method comprises: performing an initiation metric determination process, and adjusting operations of a logic component bas... | 12/01/2011 |
| 20110252249 | METHOD OF POWER SUPPLY FOR GRAPHICS CARDS The present invention provides a method of providing power supply for graphics cards. The method according to present invention comprises making graphics cards obtain power supply from outside computer chassis. The method and devices according to present invention can r... | 10/13/2011 |
| 20110252204 | SHARED SINGLE ACCESS MEMORY WITH MANAGEMENT OF MULTIPLE PARALLEL REQUESTS A memory is used by concurrent threads in a multithreaded processor. Any addressable storage location is accessible by any of the concurrent threads, but only one location at a time is accessible. The memory is coupled to parallel processing engines that generate a grou... | 10/13/2011 |
| 20110249391 | PORTABLE COMPUTER SYSTEM A portable computer system is disclosed according to the invention. The portable computer system comprises: a multi-functional processing unit with power consumption of no more than approximately 10 watts consisting of a single chip having a plurality of processors ther... | 10/13/2011 |
| 20110249015 | GRAPHICS PROCESSING UNIT BASED COLOR MANAGEMENT OF OUTPUT DEVICES A method includes querying a database to determine the color profile of the multimedia content. The method may include comparing the secondary color profile of the secondary display to the primary color profile of the primary display and then determining a secondary col... | 10/13/2011 |
| 20110249010 | UTILIZATION OF A GRAPHICS PROCESSING UNIT BASED ON PRODUCTION PIPELINE TASKS A method includes performing a task in response to a request of a secondary user interface of a secondary device. The method also includes calculating a utilization of a graphics processing unit of a machine based on the task performed by the graphics processing unit. T... | 10/13/2011 |
| 20110248993 | LIQUID CRYSTAL DISPLAY, SYSTEM AND METHOD FOR DISPLAYING THREE-DIMENSIONAL STEREO PICTURES A three-dimensional stereo display, and a system and method are provided for controlling the three-dimensional stereo display. The three-dimensional stereo display includes backlight, a first polarizer, a first liquid crystal panel, a second polarizer and a second liqui... | 10/13/2011 |
| 20110248777 | SEMICONDUCTOR CHIP WITH VOLTAGE ADJUSTABLE FUNCTION AND MANUFACTURE METHOD THEREOF The present invention provides a semiconductor chip with voltage adjustable function, said semiconductor chip is supplied with a power supply device and comprises a voltage regulating module for adjusting the voltage supplied to said semiconductor chip from said power s... | 10/13/2011 |
| 20110246754 | PERSONALIZING OPERATING ENVIRONMENT OF DATA PROCESSING DEVICE A method includes sensing a data uniquely associated with an environment of a user of a data processing device through a sensor associated with the data processing device and/or the data processing device. The method also includes personalizing an operating environment ... | 10/06/2011 |
| 20110244946 | PERSONALIZED GAMING EXPERIENCE A method includes sensing data uniquely associated with a user of a gaming system through a sensor associated therewith and/or the gaming system. The method also includes intelligently personalizing a gaming experience of the user on the gaming system based on the sense... | 10/06/2011 |
| 20110238955 | METHODS FOR SCALABLY EXPLOITING PARALLELISM IN A PARALLEL PROCESSING SYSTEM Parallelism in a parallel processing subsystem is exploited in a scalable manner. A problem to be solved can be hierarchically decomposed into at least two levels of sub-problems. Individual threads of program execution are defined to solve the lowest-level sub-problems... | 09/29/2011 |
| 20110216780 | Input/Output Request Packet Handling Techniques by a Device Specific Kernel Mode Driver The input/output request packet (IRP) handling technique includes determining if a received input/output request packet should receive a given handling. If the input/output request packet should receive the given handling, the input/output request packet is dispatched t... | 09/08/2011 |
| 20110215825 | SYSTEM AND METHOD FOR TEMPERATURE CYCLING A system and method for non-isothermal temperature cycling (also called Conduction Temperature Cycling) of a semiconductor device. The method includes inserting a semiconductor device into a testing chamber and thermally coupling the semiconductor device to a heating an... | 09/08/2011 |
| 20110210976 | TECHNIQUES FOR TRANSFERRING GRAPHICS DATA FROM SYSTEM MEMORY TO A DISCRETE GPU A method for transferring graphics data includes receiving graphics data in the system memory. The graphics data may be loaded into system memory by and application from a mass storage device. One or more graphics commands associated with the graphics data may also be r... | 09/01/2011 |
| 20110199497 | Display System, Method, and Computer Program Product for Capturing Images Using Multiple Integrated Image Sensors A display system, method, and computer program product are provided for capturing images using multiple integrated image sensors. The display system includes a front panel for displaying an image. The display system further includes a matrix of image sensors situated be... | 08/18/2011 |
| 20110191615 | MEMORY CLOCK SLOWDOWN Circuits, methods, and apparatus for slowing clock circuits on a graphics processor integrated circuit in order to reduce power dissipation. An exemplary embodiment of the present invention provides a graphics processor having two memory clocks, specifically, a switched... | 08/04/2011 |
| 20110173476 | USING NON-LOSSLESS COMPRESSION TO SAVE POWER Circuits, methods, and systems that reduce or eliminate the number of data transfers between a system memory and a graphics processor under certain conditions. After inactivity by a user of an electronic device is detected, the color fidelity of pixels being displayed i... | 07/14/2011 |
| 20110173414 | MAXIMIZED MEMORY THROUGHPUT ON PARALLEL PROCESSING DEVICES In parallel processing devices, for streaming computations, processing of each data element of the stream may not be computationally intensive and thus processing may take relatively small amounts of time to compute as compared to memory accesses times required to read ... | 07/14/2011 |
| 20110170773 | System and Method for Estimating Signal-Dependent Noise of an Image A method for estimating signal-dependent noise includes defining a plurality of pixel groups from among the image pixels. The method further includes computing, for one or more signal levels of the image, a difference value between two pixel groups, whereby a respective... | 07/14/2011 |
| 20110170557 | System and Method for Traversing a Treelet-Composed Hierarchical Structure A method for performing node traversal operations of a treelet-composed hierarchical structure includes allocating a queue for each of the plurality of treelets, each queue operable to store ray-states entering a respective one of the treelets. The method additionally i... | 07/14/2011 |
| 20110169850 | BLOCK LINEAR MEMORY ORDERING OF TEXTURE DATA A method of organizing memory for storage of texture data, in accordance with one embodiment of the invention, includes accessing a size of a mipmap level of a texture map. A block dimension may be determined based on the size the mipmap level. A memory space (e.g., com... | 07/14/2011 |
| 20110169844 | Content Protection Techniques on Heterogeneous Graphics Processing Units The graphics co-processing technique includes receiving display operation for execution by a graphics processing unit on an unattached adapter. The display operation is split into an encrypt content by the graphics processing unit on the unattached adapter, a copy from ... | 07/14/2011 |
| 20110161901 | SYSTEM AND PROCESS FOR AUTOMATIC CLOCK ROUTING IN AN APPLICATION SPECIFIC INTEGRATED CIRCUIT Embodiments of the claimed subject matter are directed to methods and a system that use a standardized grid of clock buffers to automatically route clocks according to a uniform clock grid throughout an ASIC of a non-uniform arrangement of non-uniformly sized logic part... | 06/30/2011 |
| 20110161675 | SYSTEM AND METHOD FOR GPU BASED ENCRYPTED STORAGE ACCESS A system and method for graphics processing unit (GPU) based encryption of data storage. The method includes receiving a write request, which includes write data, at a graphics processing unit (GPU) encryption driver and storing the write data in a clear data buffer. Th... | 06/30/2011 |
| 20110161616 | ON DEMAND REGISTER ALLOCATION AND DEALLOCATION FOR A MULTITHREADED PROCESSOR A system for allocating and de-allocating registers of a processor. The system includes a register file having plurality of physical registers and a first table coupled to the register file for mapping virtual register IDs to physical register IDs. A second table is cou... | 06/30/2011 |
| 20110161561 | VIRTUALIZATION OF CHIP ENABLES Virtual chip enable techniques perform memory access operations on virtual chip enables rather than physical chip enables. Each virtual chip enable is a construct that includes attributes that correspond to a unique physical or logical memory device.... | 06/30/2011 |
| 20110161553 | MEMORY DEVICE WEAR-LEVELING TECHNIQUES The wear-leveling techniques include discovering a persistent state of one or more memory devices, or building and caching persistent state parameters for each logical unit of a given memory device if a persistent state is not discovered for a given memory device. The t... | 06/30/2011 |
