A vest or belt is integrally formed with tubular, pet receiving passageways which extend around the wearer's body and terminate in pocket-like chambers for feeding and retrieval.
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| Application No. | Application Title | Issue Date |
| 20120032658 | Buck-Boost Converter Using Timers for Mode Transition Control A DC-to-DC, buck-boost voltage converter includes a duty cycle controller configured to generate control signals for a buck driver configured to drive first and second buck switching transistors at a buck duty cycle and to generate control signals for a boost driver con... | 02/09/2012 |
| 20110228871 | High Bandwidth Programmable Transmission Line Pre-Emphasis Method and Circuit In one embodiment, a transmission line pre-emphasis circuit includes a primary signal path generating a primary differential output current indicative of a digital data stream and a secondary signal path including a pulse shaping stage incorporating a network and a scal... | 09/22/2011 |
| 20110228824 | High Bandwidth Dual Programmable Transmission Line Pre-Emphasis Method and Circuit In one embodiment, a transmission line pre-emphasis circuit includes a primary signal path generating a primary differential output current indicative of a digital data stream and a secondary signal path including a pulse shaping stage incorporating a network and a scal... | 09/22/2011 |
| 20110228823 | High Bandwidth Programmable Transmission Line Pre-Emphasis Method and Circuit A transmission line pre-emphasis circuit includes a primary signal path receiving a digital data stream and generating a primary output current indicative of the digital data stream, one or more secondary signal paths each incorporating a network implementing a specific... | 09/22/2011 |
| 20110227675 | High Bandwidth Programmable Transmission Line Equalizer A transmission line equalizer includes multiple signal paths connected in parallel between an equalizer input signal and an output amplifier where each signal path has a network implementing a specific frequency dependent response and each signal path implements current... | 09/22/2011 |
| 20110151594 | METHOD AND SYSTEM FOR CONTROLLED ISOTROPIC ETCHING ON A PLURALITY OF ETCH SYSTEMS A method for forming identical isotropic etch patterns in an etch system is disclosed. The method comprises providing a wafer paddle, a wafer, a plurality of identical etch systems, utilizing identical etch recipes within each of the plurality of etch systems, providing... | 06/23/2011 |
| 20110043172 | Buck-Boost Converter With Smooth Transitions Between Modes In a buck-boost converter, the method compensates for the boost mode power switch having a minimum on-time when entering the buck-boost mode from the buck mode by immediately decreasing a duty cycle of the buck mode power switch upon entering the buck-boost mode. This p... | 02/24/2011 |
| 20110024839 | Lateral DMOS Field Effect Transistor with Reduced Threshold Voltage and Self-Aligned Drift Region A method of forming a lateral DMOS transistor includes performing a low energy implantation using a first dopant type and being applied to the entire device area. The dopants of the low energy implantation are blocked by the conductive gate. The method further includes ... | 02/03/2011 |
| 20110024836 | Field Effect Transistor With Trench-Isolated Drain A MOS transistor includes a body region of a first conductivity type, a conductive gate and a first dielectric layer, a source region of a second conductivity type formed in the body region, a heavily doped source contact diffusion region formed in the source region, a ... | 02/03/2011 |
| 20100320992 | Buck-Boost Converter With Sample And Hold Circuit In Current Loop In an average-current mode control type buck-boost PWM converter, a sample and hold circuit is inserted in the current loop to avoid problems associated with ripple of the average inductor current demand signal. The rippling average inductor current is generated by a di... | 12/23/2010 |
| 20100253385 | EDGE DETECT RECEIVER CIRCUIT A digital signal detector detects digital signals by only sensing the rising and falling edges of a received digital signal and latches the logic state between the detected edges. Such edges contain very high frequencies that are much higher than the fundamental frequen... | 10/07/2010 |
| 20100202470 | Dynamic Queue Memory Allocation With Flow Control A method in an Ethernet controller for allocating memory space in a buffer memory between a transmit queue (TXQ) and a receive queue (RXQ) includes allocating initial memory space in the buffer memory to the RXQ and the TXQ; defining a RXQ high watermark and a RXQ low w... | 08/12/2010 |
| 20100180249 | Chip-Scale Package Conversion Technique for Dies A method is described for converting an existing die, originally designed for a non-chip-scale package, to a chip-scale package die, where the die's bonding pads are located in positions within a defined grid of candidate positions. In the first step, the die's layout, ... | 07/15/2010 |
| 20100065906 | SYSTEM FOR VERTICAL DMOS WITH SLOTS A device for providing a high power, low resistance, efficient vertical DMOS device is disclosed. The device comprises providing a semiconductor substrate with a source body structure thereon. The device further comprises a plurality of slots in the source/body structur... | 03/18/2010 |
| 20100052708 | Tester for RF Devices For testing an RF device, such as an RF receiver/decoder chip that receives an RF signal via an antenna terminal and outputs a digital code at an output terminal, an inexpensive non-RF programmable tester is used. The programmable tester is a commercially available test... | 03/04/2010 |
| 20100032753 | MOS Transistor Including Extended NLDD Source-Drain Regions For Improved Ruggedness A MOS transistor includes a conductive gate insulated from a semiconductor layer by a dielectric layer, first and second lightly-doped diffusion regions formed self-aligned to respective first and second edges of the conductive gate, a first diffusion region formed self... | 02/11/2010 |
| 20100020809 | True Ring Networks Using Tag VLAN Filtering A method in a network device configured in a true ring network where the network device has a first port and a second port connected to the true ring network and a third port connected to a processor including: connecting the network device to transmit data packets in a... | 01/28/2010 |
| 20100020798 | True Ring Networks With Gateway Connections Using MAC Source Address Filtering A method in a network device implements source address filtering, including gateway address filtering, to enable network devices to be configured in a true Ethernet ring network. By implementing source address filtering or source address filtering with gateway address f... | 01/28/2010 |
| 20100011140 | Ethernet Controller Using Same Host Bus Timing for All Data Object Access An Ethernet controller has a host interface for coupling to a host processor and a physical layer transceiver for coupling to a data network and includes multiple data objects having different access times where the data objects communicate with the host interface over ... | 01/14/2010 |
| 20100008378 | Ethernet Controller Implementing a Performance and Responsiveness Driven Interrupt Scheme A method of generating frame receive interrupts in an Ethernet controller including receiving incoming data frames and storing data frames into a receive queue, monitoring the number of received data frames, and when the number of received data frames exceeds a first th... | 01/14/2010 |
| 20100007363 | SYSTEM AND METHOD FOR DETERMINING IN-LINE INTERFACIAL OXIDE CONTACT RESISTANCE The present invention relates generally to semiconductor wafer fabrication and more particularly but not exclusively to advanced process control methodologies for measuring in-line contact resistance in relation to oxide formations. The present invention, in one or more... | 01/14/2010 |
| 20100007316 | Current Sensing In a Buck-Boost Switching Regulator Using Integrally Embedded PMOS Devices A current sense device for a power transistor is described. The power transistor is formed in a cellular structure including a cellular array of transistor cells. The current sense device includes multiple transistor cells in the cellular array of transistor cells of th... | 01/14/2010 |
| 20090302378 | METHOD AND SYSTEM FOR VERTICAL DMOS WITH SLOTS A method for providing a high power, low resistance, high efficient vertical DMOS device is disclosed. The method comprises providing a semiconductor substrate with a source body structure thereon. The method further comprises providing a plurality of slots in the sourc... | 12/10/2009 |
| 20090284289 | METHOD OF IMPLEMENTING POWER-ON-RESET IN POWER SWITCHES A power switch circuit and method is provided for having the capability of (1) a power switch circuit having a POR in which the switch is enabled at a predetermined voltage such that the switch is unable to be activated when a minimum lower input voltage is not achieved... | 11/19/2009 |
| 20090284235 | Adaptive Compensation Scheme for LC Circuits In Feedback Loops A method for providing adaptive compensation for an electrical circuit where the electrical circuit includes an inductor-capacitor network connected in a feedback loop being compensated by a first compensation capacitance value and a second compensation capacitance valu... | 11/19/2009 |
| 20090283843 | NMOS Transistor Including Extended NLDD-Drain For Improved Ruggedness A MOS transistor includes a conductive gate insulated from a semiconductor layer by a first dielectric layer, lightly-doped source/drain regions being formed self-aligned to respective first and second edges of the conductive gate, a source region being formed self-alig... | 11/19/2009 |
| 20090273290 | Boost LED Driver Not Using Output Capacitor and Blocking Diode An LED driver is disclosed that boosts an input voltage to drive any number of LEDs in series. The driver includes a switch-mode current regulator that supplies regulated current pulses to the LEDs. No high voltage output capacitor is used to smooth the current pulses, ... | 11/05/2009 |
| 20090251071 | Driving Multiple Parallel LEDs with Reduced Power Supply Ripple An LED driver is disclosed that drives LEDs connected in parallel. Instead of applying current to all the parallel-connected LEDs at the same time, under control of a common PWM brightness control signal, the application of current to each parallel path is staggered by ... | 10/08/2009 |
| 20090230883 | Stacked LED Controllers A driver for driving a plurality of light emitting diodes (LEDs) is formed of a plurality of LED controllers connected in series between a power supply and a reference voltage. Each controller drives one or more LEDs directly connected to it. Each controller has a volta... | 09/17/2009 |
| 20090210210 | METHOD OF ACCURATE PREDICTION OF ELECTROSTATIC DISCHARGE (ESD) PERFORMANCE IN MULTI-VOLTAGE ENVIRONMENT The present invention relates generally to semiconductor wafer fabrication and more particularly but not exclusively to predictive, pre-fabrication methodologies for determining inefficiencies in an integrated circuit (IC) design. The present invention, in one or more i... | 08/20/2009 |
| 20090206919 | NO-TRIM LOW-DROPOUT (LDO) AND SWITCH-MODE VOLTAGE REGULATOR CIRCUIT AND TECHNIQUE An optimized output voltage circuit and technique obtainable without trimming is set forth. A voltage reference circuit and method devoid of trim resistors comprising a high gain amplifier, a plurality of bandgap resistors, and at least a plurality of bipolar devices in... | 08/20/2009 |
| 20090190621 | Laser Turn-On Accelerator Independent of Bias Control Loop Bandwidth An accelerator circuit is incorporated in a laser diode system for accelerating the turn-on operation of the laser diode independent of the control loop bandwidth of the laser diode system. The accelerator circuit provides a boost current to a compensation capacitor upo... | 07/30/2009 |
| 20090189539 | Controlling Current Through Serial LEDs Using a Low Voltage Transistor When Using a High Voltage Driver Various circuits are described herein where a series transistor used to control current through a string of LEDs, driven by a high voltage, is not subjected to the high voltage when the transistor is turned off pursuant to a PWM signal. To avoid the transistor experienc... | 07/30/2009 |
| 20090184655 | POWER MANAGEMENT SYSTEM FOR LIGHT EMITTING DIODES A power management system comprising: providing a one pin driver circuit; sourcing a managed current from the one pin driver circuit; and illuminating a light emitting diode by the managed current including reducing the managed current when the light emitting diode is n... | 07/23/2009 |
| 20090176181 | SYSTEM AND METHOD OF IMPROVED PRESSURE CONTROL IN HORIZONTAL DIFFUSION FURNACE SCAVENGER SYSTEM FOR CONTROLLING SILICON OXIDE GROWTH The present invention relates generally to semiconductor wafer fabrication and more particularly but not exclusively to advanced process control methodologies for controlling oxide formation using pressure. The present invention, in one or more implementations, includes... | 07/09/2009 |
| 20090159561 | INTEGRATED DEVICE TECHNOLOGY USING A BURIED POWER BUSS FOR MAJOR DEVICE AND CIRCUIT ADVANTAGES A method for providing an improved integrated circuit device is disclosed. The method comprises the steps of providing active and passive areas in the substrate, providing a plurality of slots in the substrate after providing the active and passive areas, and oxidizing ... | 06/25/2009 |
| 20090147425 | Overcurrent Protection Circuit When Setting Current Using a Package Control Pin An overcurrent protection circuit for a current setting circuit is disclosed herein that prevents a user-selectable current from exceeding a current limit when an incorrect current selecting component (or current selecting circuit) is connected to an external control pi... | 06/11/2009 |
| 20090140579 | Relay Switch Including an Energy Detection Circuit A semiconductor relay switch having two data ports receiving incoming signals and a power supply terminal receiving a power supply voltage is responsive to a power supply voltage level and an energy level of the incoming signals to open and close its conduction paths. T... | 06/04/2009 |
| 20090138742 | Automatic Clock and Data Alignment A circuit is described for automatically adjusting a phase of an input register load clock to be synchronized with transitions of data bits forming an n-bit word. The circuit detects the first transition of a data bit in the n-bit word. The circuit then time-shifts the ... | 05/28/2009 |
| 20090130813 | Method and System to Provide a Polysilicon Capacitor with Improved Oxide Integrity A system and method in accordance with the present invention allows for an improved oxide integrity of a polysilicon capacitor compared to capacitors manufactured using conventional semiconductor processing techniques. This is accomplished by moving the capacitor implan... | 05/21/2009 |